MCP2150-I/SO Microchip Technology, MCP2150-I/SO Datasheet - Page 10

IC IRDA STD CONTROLLER 18SOIC

MCP2150-I/SO

Manufacturer Part Number
MCP2150-I/SO
Description
IC IRDA STD CONTROLLER 18SOIC
Manufacturer
Microchip Technology

Specifications of MCP2150-I/SO

Package / Case
18-SOIC (7.5mm Width)
Controller Type
IRDA Standard Protocol Stack Controller
Interface
UART
Voltage - Supply
3 V ~ 5.5 V
Current - Supply
7mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
No. Of Tx Buffers
2
No. Of Rx Buffers
2
Supply Voltage Range
3V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
18
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP215XDM - BOARD DEMO FOR MCP215X
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP2150-I/SO
Manufacturer:
MIC
Quantity:
20 000
MCP2150
2.8
The device can be placed in a low power mode by dis-
abling the device (holding the EN pin at the low state).
The internal state machine is monitoring this pin for a
low level and, once this is detected, the device is
disabled and enters into a low power state.
2.8.1
When disabled, the device is in a low power state.
When the EN pin is brought to a high level, the device
will return to the operating mode. The device requires
a delay of 1024 T
or received.
FIGURE 2-5:
DS21655B-page 10
Minimizing Power
LLC (Logical Link Control)
Acceptance Filtering
Overload Notification
Recovery Management
MAC (Medium Access Control)
Data Encapsulation/Decapsulation
Frame Coding (stuffing, destuffing)
Medium Access Management
Error Detection
Error Signalling
Acknowledgment
Serialization/Deserialization
PLS (Physical Signalling)
Bit Encoding/Decoding
Bit Timing
Synchronization
PMA (Physical Medium Attachment)
Driver/Receiver Characteristics
MDI (Medium Dependent Interface)
Connectors
RETURNING TO DEVICE
OPERATION
OSI REFERENCE LAYERS
OSC
Data Link Layer
Physical Layer
before data may be transmitted
ISO REFERENCE LAYER MODEL
Presentation
Application
Transport
Network
Session
Preliminary
2.9
Figure 2-5
Model. The shaded areas are implemented by the
MCP2150, the cross-hatched area is implemented by
an infrared transceiver. The unshaded areas should be
implemented by the Host Controller.
Network Layering Reference
Model
shows the ISO Network Layering Reference
Has to be implemented in Host
Controller firmware
(such as a PICmicro
microcontroller)
Regions implemented
by the MCP2150
Regions implemented
by the Optical Transceiver logic
Fault
confinement
(MAC-LME)
Bus Failure
management
(PLS-LME)
Supervisor
2002 Microchip Technology Inc.
®

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