LTC4269IDKD-2#TRPBF Linear Technology, LTC4269IDKD-2#TRPBF Datasheet - Page 24
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LTC4269IDKD-2#TRPBF
Manufacturer Part Number
LTC4269IDKD-2#TRPBF
Description
IC PD/SYNC FORWARD CTRLR 32-DFN
Manufacturer
Linear Technology
Type
Power Over Ethernet (PoE)r
Datasheet
1.LTC4269CDKD-2PBF.pdf
(34 pages)
Specifications of LTC4269IDKD-2#TRPBF
Applications
Power Interface Switch for Power Over Ethernet (PoE) Devices
Voltage - Supply
14 V ~ 16 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-DFN
Current - Supply
1.35mA
Interface
IEEE 802.3af
Controller Type
Powered Device Interface Controller (PD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LTC4269-2
applicaTions inForMaTion
Programming Oscillator Frequency
The oscillator frequency (f
grammed using an external resistor, R
between the R
f
ning oscillator frequency is programmable in the range
of 100kHz to 500kHz.
Stray capacitance and potential noise pickup on the R
pin should be minimized by placing the R
close as possible to the R
the R
the R
ground) GND pin. R
Programming Leading Edge Blank Time
For PWM controllers driving external MOSFETs, noise
can be generated at the source of the MOSFET during
gate rise time and some time thereafter. This noise can
potentially exceed the OC and I
LTC4269-2 to cause premature turn-off of SOUT and OUT
pins in addition to false trigger of soft-start. The LTC4269-2
provides a programmable leading edge blanking of the
OC and I
sensing during MOSFET switching.
Blanking is provided in two phases (Figure 12): The first
phase automatically blanks during gate rise time. Gate rise
OSC
R
OSC
OSC
vs R
OSC
= 9.125k [(4100k/f
SENSE
Figure 11. Oscillator Frequency, f
resistor should be returned directly to the (analog
node as small as possible. The ground side of
OSC
500
450
400
350
300
250
200
150
100
50
OSC
resistor values. The LTC4269-2 free-run-
comparator outputs to avoid false current
100
pin and GND. Figure 11 shows typical
OSC
150
can be calculated by:
200
R
OSC
OSC
OSC
OSC
(k )
pin and keeping the area of
250
) of the LTC4269-2 is pro-
SENSE
) – 1]
300
pin thresholds of the
OSC
350
42692 F11
, vs R
OSC
OSC
400
, connected
OSC
resistor as
OSC
times can vary depending on MOSFET type. For this reason
the LTC4269-2 performs true ‘leading edge blanking’ by
automatically blanking OC and I
until OUT rises to within 0.5V of V
level of 13V. The second phase of blanking starts after
the leading edge of OUT has been completed. This phase
is programmable by the user with a resistor connected
from the BLANK pin to GND. Typical durations for this
portion of the blanking period are from 45ns at R
= 10k to 540ns at R
be approximated as:
(See graph in the Typical Performance Characteristics
section).
Programming Current Limit (OC Pin)
The LTC4269-2 uses a precise 107mV sense threshold
at the OC pin to detect overcurrent conditions in the
converter and set a soft-start latch. It is independent of
duty cycle because it is not affected by slope compensa-
tion programmed at the I
the peak current in the primary MOSFET by sensing the
voltage across a sense resistor (R
MOSFET. The overcurrent limit for the converter can be
programmed by:
OUT
BLANKING
Blanking (extended) = [45(R
Overcurrent limit = (107mV/R
(AUTOMATIC)
BLANKING
LEADING
0
EDGE
Figure 12. Leading Edge Blank Timing
Xns X + 45ns
R
= 10k
(MIN)
BLANK
BLANK
SENSE
10k < R
(PROGRAMMABLE)
= 120k. Blanking duration can
EXTENDED
BLANKING
BLANK
SENSE
BLANK
pin. The OC pin monitors
S
)(N
IN
S
) in the source of the
240k
or reaches its clamp
P
comparator outputs
/10k)]ns
[X + 45(R
/N
S
) – (½)(I
CURRENT
BLANK
SENSE
DELAY
100ns
/10k)]ns
RIPPLE
BLANK
42692fb
42692 F12
)