CY7C63813-PXC Cypress Semiconductor Corp, CY7C63813-PXC Datasheet - Page 85

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CY7C63813-PXC

Manufacturer Part Number
CY7C63813-PXC
Description
IC USB PERIPHERAL CTRLR 18-DIP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Type
USB Peripheral Controllerr
Datasheet

Specifications of CY7C63813-PXC

Package / Case
18-DIP (0.300", 7.62mm)
Controller Type
USB Peripheral Controller
Interface
USB
Voltage - Supply
4 V ~ 5.5 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Mounting Style
Through Hole
Operating Temperature Range
0 C to + 70 C
Supply Current
40 mA
Operating Supply Voltage
4 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C63813-PXC
Manufacturer:
Cypress Semiconductor
Quantity:
135
Part Number:
CY7C63813-PXC
Manufacturer:
Cypress
Quantity:
48
34. Document History Page
Document 38-08035 Rev. *N
Revision
Document Title: CY7C63310, CY7C638xx enCoRe™ II Low Speed USB Peripheral Controller
Document Number: 38-08035
*M
*N
*K
*L
*J
ECN No.
2147747
2620679
2964259
3074654
3193555
Change
Orig. of
CMCC/
KKCN
AESA
PYRS
AJHA
VGT/
NXZ
05/20/2008
sion Date
Submis-
12/12/08
06/29/10
10/29/10
03/14/11
(continued)
TID number entered on page 1. Also changed the sentence “High current drive
on GPIO pins” to “2mA source current on all GPIO pins”.
Point 26.0,
of Vcc3 (line 3) to 4.0 and 5.5 respectively.
Point 19.0, title modified to “Regulator Output”, instead of “USB Regulator
Output”.
Added a point # 3 under Point 17.3.
Changed the storage temperature to “-40C to 90C” in Point # 25.0
Maximum Ratings on page
Added the die form after the end of page 4.
In line 3, under “Bit 2: P1.2/VREG” of
were “CY7C63310/CY7C638xx” instead of “CY7C63813.
In line 1, under “Bit 6: USB CLK/2 Disable” of
the word “clock” instead of “crystal oscillator”.
Entered the word “Reserved” and left its corresponding fields blank in the
sub-table under “Bit[2:0]: VM[2:0]” of
Under “Bit [7:6]: Sleep Duty Cycle[1:0]”, made the following changes:
0 0 = 1/128 periods of the internal 32 kHz low speed oscillator.
0 1 = 1/512 periods of the internal 32 kHz low speed oscillator.
1 0 = 1/32 periods of the internal 32 kHz low speed oscillator.
1 1 = 1/8 periods of the internal 32 kHz low speed oscillator.
In
lower case.
Added 32-Pin Sawn QFN Pin Diagram, package diagram, and ordering
information.
Removed references to 3V for the 32 kHz oscillator in Section 10. Clocking.
Added information on SROM Table read - section 9.6.
Updated section 12.3 Low-Power in Sleep Mode - Included Set P10CR[1] -
during non-USB mode operations.
Added section 25 - Voltage Vs CPU Frequency char.
P1DATA register information updated. Vreg can operate independent of USB
connection.
Included IMO and ILO characteristics in the AC char section.
Updated to data sheet template *E.
Added Package Handling information
Added partnumber CY7C63803-LQXC to the ordering information table and
added package diagram (spec 001-13937)
Removed inactive parts from ordering information table.
CY7C63310-PXC
CY7C63801-PXC
CY7C63833-LFXC
Updated package diagrams.
Added Ordering Code Definition, Acronyms, and Document Conventions.
Added part CY7C63823-3XW14C to the ordering information table.
Table 17-2 on page
DC Characteristics on page
53, in line 4, deleted “57”, and made the word “AND” to
Description of Change
69).
Table 14-2 on page
Table 13-1 on page
CY7C63310, CY7C638xx
69, changed the min. and max. voltages
Table 10-3 on page
35, the changes made
32.
Page 85 of 86
23, entered
(Absolute
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