FDC37C665GT-MS SMSC, FDC37C665GT-MS Datasheet - Page 65

IC CTRLR SUPER I/O MULTI 100-QFP

FDC37C665GT-MS

Manufacturer Part Number
FDC37C665GT-MS
Description
IC CTRLR SUPER I/O MULTI 100-QFP
Manufacturer
SMSC
Datasheet

Specifications of FDC37C665GT-MS

Controller Type
I/O Controller
Interface
ISA Host
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
35mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1007

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37C665GT-MS
Manufacturer:
Microchip Technology
Quantity:
10 000
NC: No Change, the same value as the one at the beginning of command execution.
LSB: Least Significant Bit, the LSB of H is complemented.
Write Data
After the Write Data command has been issued,
the FDC loads the head (if it is in the unloaded
state), waits the specified head load time if
unloaded (defined in the Specify command),
and begins reading ID fields. When the sector
address read from the diskette matches the
sector address specified in the command, the
FDC reads the data from the host via the FIFO
and writes it to the sector's data field.
After writing data into the current sector, the
FDC computes the CRC value and writes it into
the CRC field at the end of the sector transfer.
The Sector Number stored in "R" is incremented
by one, and the FDC continues writing to the
next data field. The FDC continues this "Multi-
Sector Write Operation".
terminal count signal or if a FIFO over/under run
occurs while a data field is being written, then
MT
0
1
HEAD
0
1
0
1
TRANSFERRED TO
FINAL SECTOR
Less than EOT
Less than EOT
Less than EOT
Less than EOT
Equal to EOT
Equal to EOT
Equal to EOT
Equal to EOT
Upon receipt of a
HOST
Table 27 - Result Phase Table
65
C + 1
C + 1
C + 1
NC
NC
NC
NC
NC
the remainder of the data field is filled with
zeros.
The FDC reads the ID field of each sector and
checks the CRC bytes. If it detects a CRC error
in one of the ID fields, it sets the IC code in
Status
termination), sets the DE bit of Status Register 1
to "1", and terminates the Write Data command.
The Write Data command operates in much the
same manner as the Read Data command. The
following items are the same. Please refer to
the Read Data Command for details:
Ÿ
Ÿ
Ÿ
Ÿ
Ÿ
C
D INFORMATION AT RESULT PHASE
Transfer Capacity
EN (End of Cylinder) bit
ND (No Data) bit
Head Load, Unload Time Interval
ID information when the host terminates the
command
Register
LSB
LSB
NC
NC
NC
NC
NC
NC
H
0
R + 1
R + 1
R + 1
R + 1
to
01
01
01
01
R
"01"
(abnormal
NC
NC
NC
NC
NC
NC
NC
NC
N

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