KSZ8851SNL TR Micrel Inc, KSZ8851SNL TR Datasheet - Page 51

• Manufacturer Part Number: KSZ8851SNL TR
• Description: IC CTLR MAC/PHY NON-PCI 32-MLF
• Manufacturer: Micrel Inc

Specifications of KSZ8851SNL TR

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-MLF®, QFN
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-3293 - BOARD EVALUATION KSZ8851SNL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3299-2

TXQ Memory Information Register (0x78 – 0x79): TXMIR
This register indicates the amount of free memory available in the TXQ of the QMU module.
0x7A – 0x7B: Reserved
Receive Frame Header Status Register (0x7C – 0x7D): RXFHSR
This register indicates the received frame header status information, the received frames are reported in RXFCTR
register. This register contains the status information for the frame received and the CPU can read so many times same
as the frame count value in the RXFCTR.
August 2009
Micrel, Inc.
Bit
1
0
Bit
15-13
12-0
Bit
15
14
13
12
11
10
9-8
7
6
5
4
0x0
0x0
-
-
-
-
-
-
-
-
-
-
-
-
-
Default Value
Default Value
Default Value
R/W
RW
RW
R/W
RO
RO
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Description
RXICMPFCC Receive ICMP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct ICMP checksum for incoming
ICMP frames (only for non-fragment frame). Any received ICMP frames with incorrect
checksum will be discarded.
RXSAF Receive Source Address Filtering
When this bit is set, the KSZ8851SNL will drop the frame if the source address is same as
MAC address in MARL, MARM, MARH registers.
Description
Reserved
TXMA Transmit Memory Available
The amount of memory available is represented in units of byte. The TXQ memory is
used for both frame payload, control word.
Note: Software must be written to ensure that there is enough memory for the next
transmit frame including control information before transmit data is written to the TXQ.
Description
RXFV Receive Frame Valid
When this bit is set, it indicates that the present frame in the receive packet memory is
valid. The status information currently in this location is also valid.
When clear, it indicates that there is either no pending receive frame or that the current
frame is still in the process of receiving.
Reserved
RXICMPFCS Receive ICMP Frame Checksum Status
When this bit is set, the KSZ8851SNL received ICMP frame checksum field is incorrect.
RXIPFCS Receive IP Frame Checksum Status
When this bit is set, the KSZ8851SNL received IP header checksum field is incorrect.
RXTCPFCS Receive TCP Frame Checksum Status
When this bit is set, the KSZ8851SNL received TCP frame checksum field is incorrect.
RXUDPFCS Receive UDP Frame Checksum Status
When this bit is set, the KSZ8851SNL received UDP frame checksum field is incorrect.
Reserved
RXBF Receive Broadcast Frame
When this bit is set, it indicates that this frame has a broadcast address.
RXMF Receive Multicast Frame
When this bit is set, it indicates that this frame has a multicast address (including the
broadcast address).
RXUF Receive Unicast Frame
When this bit is set, it indicates that this frame has a unicast address.
RXMR Receive MII Error
When set, it indicates that there is an MII symbol error on the received frame.
51
KSZ8851SNL/SNLI
M9999-083109-2.0