Z8523020VSG Zilog, Z8523020VSG Datasheet - Page 25

IC 20MHZ ESCC 44-PLCC

Z8523020VSG

Manufacturer Part Number
Z8523020VSG
Description
IC 20MHZ ESCC 44-PLCC
Manufacturer
Zilog
Datasheet

Specifications of Z8523020VSG

Controller Type
Serial Communications Controller (SCC)
Interface
Bus
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
9mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3928
Z8523020VSG

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PS005303-0907
Table 3. Data Encoding Descriptions
Code Type
NRZ
NRZI
For FM encoding, the DPLL counts from 0 to 32, but with a cycle corresponding to two
bit times. When the DPLL is locked, the clock edges in the data stream occurs between
counts 15 and 16 and between counts 31 and 0. The DPLL looks for edges only during a
time centered on the 15 to 16 counting transition.
The 32x clock for the DPLL can be programmed to come from either the RTxC input or
the output of the BRG. The DPLL output is programmed to be echoed out the ESCC by the
TRxC pin (if this pin is not being used as an input).
Data Encoding
Data encoding allows the transmission of clock and data information over the same
medium. This capability saves the need to transmit clock and data over separate medium
as is normally required tor synchronous data. The ESCC provides four different data
encoding methods, selected by bits 6 and 5 in WR10. Examples of these 4 encoding meth-
ods is illustrated in
ASYNCHRONOUS or SYNCHRONOUS. The data encoding selected is active even if
the transmitter or receiver is idling or disabled.
Table 3
Data
NRZ
NRZI
FM1
FM0
1
describes the four encoding methods, their levels, and values.
1
Figure 11. Data Encoding Methods
Level
High
Low
No Change
Change
Figure
0
11. Any encoding method is used in any X1 mode in the ESCC,
0
1
0
Product Specification
Value
1
0
1
0
Functional Description
Z85230/Z80230
20

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