KSZ8842-16MQL Micrel Inc, KSZ8842-16MQL Datasheet - Page 117
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KSZ8842-16MQL
Manufacturer Part Number
KSZ8842-16MQL
Description
IC SWITCH 10/100 16BIT 128PQFP
Manufacturer
Micrel Inc
Datasheets
1.KSZ8841-PMQLI.pdf
(2 pages)
2.KSZ8842-16MQL.pdf
(126 pages)
3.KSZ8842-16MQL.pdf
(141 pages)
Specifications of KSZ8842-16MQL
Data Rate
100Mbps
Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
No. Of Ports
1
Ethernet Type
IEEE 802.3u
Supply Current
122mA
Supply Voltage Range
3.1V To 3.5V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
QFP
No. Of
RoHS Compliant
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Interface Type
PCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1634 - BOARD EVALUATION KSZ8842-16MQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1478-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8842-16MQLI
Manufacturer:
MICREL
Quantity:
760
Synchronous Read Timing (VLBUSN = 0)
Micrel Confidential
November 2005
Symbol
t10
t11
t1
t2
t3
t4
t5
t6
t7
t8
t9
Address, AEN, BExN
Parameter
A1-A15, AEN, BExN[3:0] setup to ADSN rising
A1-A15, AEN, BExN[3:0] hold after ADSN rising
CYCLEN setup to LCLK rising
CYCLEN hold after LCLK rising (non-burst mode)
SWR setup to BCLK
Read data hold from LCLK rising
Read data setup to BCLK
SRDYN setup to BCLK
SRDYN hold to BCLK
RDYRTNN setup to LCLK rising
RDYRTNN hold after LCLK rising
Read Data
RDYRTNN
CYCLEN
SRDYN
Table 31. Synchronous Read (VLBUSN = 0) Timing Parameters
ADSN
BCLK
SWR
Figure 23. Synchronous Read Cycle – VLBUSN = 0
valid
t1
117
t2
t5
t3
t4
Min
4
2
4
2
4
1
8
8
1
4
1
t7
valid
t8
t10
Typ
t6
t9
t11
Max
KSZ8842-16/32 MQL/MVL
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 1.4