CY7C63823-SXC Cypress Semiconductor Corp, CY7C63823-SXC Datasheet - Page 57

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CY7C63823-SXC

Manufacturer Part Number
CY7C63823-SXC
Description
IC USB PERIPHERAL CTRLR 24-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C63823-SXC

Controller Type
USB Peripheral Controller
Interface
USB
Voltage - Supply
4 V ~ 5.5 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
No. Of I/o's
20
Ram Memory Size
256Byte
Cpu Speed
24MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Supply Voltage Range
4V To 5.5V
Core Size
8 Bit
Program Memory Size
8KB
Embedded Interface Type
PS/2, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C63823-SXC
Manufacturer:
CYPRESS/PBF
Quantity:
11 205
Part Number:
CY7C63823-SXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
18. Regulator Output
18.1 VREG Control
Table 18-1. VREG Control Register (VREGCR) [0x73] [R/W]
Document 38-08035 Rev. *N
Bit [7:2]: Reserved
Bit 1: Keep Alive
Keep Alive, when set, allows the voltage regulator to source up to 20 µA of current when the voltage regulator is disabled.
P12CR[0],P12CR[7] must be cleared.
0 = Disabled
1 = Enabled
Bit 0: VREG Enable
This bit turns on the 3.3 V voltage regulator. The voltage regulator only functions within specifications when V
This block must not be enabled when V
0 = Disable the 3.3 V voltage regulator output on the VREG/P1.2 pin.
1 = Enable the 3.3 V voltage regulator output on the VREG/P1.2 pin. GPIO functionality of P1.2 is disabled.
Note Use of the alternate drive on pins P1.3–P1.6 requires that the VREG Enable bit be set to enable the regulator and provide
the alternate voltage.
Read/Write
Default
Field
Bit #
7
0
6
0
CC
is below 4.35V—although no damage or irregularities occur if it is enabled below 4.35 V.
5
0
Reserved
4
0
3
0
CY7C63310, CY7C638xx
2
0
Keep Alive
R/W
1
0
CC
is above 4.35 V.
VREG Enable
Page 57 of 86
R/W
0
0
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