LTC4267IGN-1#PBF Linear Technology, LTC4267IGN-1#PBF Datasheet - Page 14

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LTC4267IGN-1#PBF

Manufacturer Part Number
LTC4267IGN-1#PBF
Description
IC POE 802.3AF 16-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4267IGN-1#PBF

Controller Type
Power over Ethernet Controller (POE)
Interface
IEEE 802.3af
Current - Supply
3mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-

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LTC4267-1
APPLICATIO S I FOR ATIO
14
is not disabled during the current-limited turn-on sequence,
the PD circuitry will rob current intended for charging up
the load capacitor and create a slow rising input, possibly
causing the LTC4267-1 to go into thermal shutdown.
The ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D pin connects to an internal open drain, 100V
transistor capable of sinking 1mA. Low impedance to
V
ance during signature and classifi cation probing and in
the event of a thermal overload. During turn-off, ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D
is deactivated when the input voltage drops below 30V.
In addition, ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D may go active briefl y at turn-on for
fast rising input waveforms. ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D is referenced to the
V
tential. Connect the ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D pin to the switching regulator
circuitry as shown in Figure 7.
the LTC4267-1 will attempt to quickly charge capacitor C1
using an internal secondary current limit circuit. In this
scenario, the PSE current limit should provide the overall
limit for the circuit. For slower rising inputs, the 375mA
current limit in the LTC4267-1 will set the charge rate of
the capacitor C1. In either case, the ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D signal may
go inactive briefl y while the capacitor is charged up to the
new line voltage. In the design of a PD, it is necessary
to determine if a step in the input voltage will cause the
⎯ P ⎯ W ⎯ R ⎯ G ⎯ D signal to go inactive and how to respond to this
event. In some designs, it may be desirable to fi lter the
⎯ P ⎯ W ⎯ R ⎯ G ⎯ D signal so that intermittent power bad conditions
are ignored. Figure 7 demonstrates a method to insert a
lowpass fi lter on the power good interface.
For PD designs that use a large load capacitor and also con-
sume a lot of power, it is important to delay activation of the
switching regulator with the ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D signal. If the regulator
PORTN
PORTN
pin and when active, will be near the V
indicates power is good. ⎯ P ⎯ W ⎯ R ⎯ G ⎯ D is high imped-
Figure 6. LTC4267-1 Power Good
U
U
W
U
PORTN
po-
PD Interface Thermal Protection
The LTC4267-1 PD Interface includes thermal overload
protection in order to provide full device functionality
in a miniature package while maintaining safe operating
temperatures. Several factors create the possibility of
signifi cant power dissipation within the LTC4267-1. At
turn-on, before the load capacitor has charged up, the
instantaneous power dissipated by the LTC4267-1 can be
as much as 10W. As the load capacitor charges up, the
power dissipation in the LTC4267-1 will decrease until it
reaches a steady-state value dependent on the DC load
current. The size of the load capacitor determines how fast
the power dissipation in the LTC4267-1 will subside. At
room temperature, the LTC4267-1 can typically handle load
capacitors as large as 800μF without going into thermal
shutdown. With large load capacitors, the LTC4267-1 die
temperature will increase by as much as 50°C during a
single turn-on sequence. If for some reason power were
removed from the part and then quickly reapplied so that
the LTC4267-1 had to charge up the load capacitor again,
the temperature rise would be excessive if safety precau-
tions were not implemented.
The LTC4267-1 PD interface protects itself from thermal
damage by monitoring the die temperature. If the die
Figure 7. Power Good Interface Examples
42671f

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