ENC28J60-I/SP Microchip Technology, ENC28J60-I/SP Datasheet - Page 13
![IC ETHERNET CTRLR W/SPI 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
ENC28J60-I/SP
Manufacturer Part Number
ENC28J60-I/SP
Description
IC ETHERNET CTRLR W/SPI 28DIP
Manufacturer
Microchip Technology
Specifications of ENC28J60-I/SP
Package / Case
28-DIP (0.300", 7.62mm)
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Operating Supply Voltage
3.1 V to 3.6 V
Supply Current (max)
180 mA
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps
Ethernet Connection Type
10Base-T
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ENC28J60-I/SP
Manufacturer:
MICROCHIP
Quantity:
6 500
3.0
All memory in the ENC28J60 is implemented as static
RAM. There are three types of memory in the
ENC28J60:
• Control Registers
• Ethernet Buffer
• PHY Registers
The Control registers’ memory contains the registers
that are used for configuration, control and status
retrieval of the ENC28J60. The Control registers are
directly read and written to by the SPI interface.
FIGURE 3-1:
© 2008 Microchip Technology Inc.
Note:
ECON1<1:0>
MEMORY ORGANIZATION
=
=
=
=
Memory areas are not shown to scale. The size of the control memory space has been scaled to show detail.
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
ENC28J60 MEMORY ORGANIZATION
1Ah
1Fh
1Ah
1Fh
1Ah
1Fh
1Fh
1Ah
00h
19h
00h
19h
00h
19h
00h
19h
Control Registers
Registers
Registers
Registers
Registers
Common
Common
Common
Common
Preliminary
Buffer Pointers in Bank 0
The Ethernet buffer contains transmit and receive
memory used by the Ethernet controller in a single
memory space. The sizes of the memory areas are
programmable by the host controller using the SPI
interface. The Ethernet buffer memory can only be
accessed via the read buffer memory and write buffer
memory SPI commands (see Section 4.2.2 “Read
Buffer Memory Command” and Section 4.2.4 “Write
Buffer Memory Command”).
The PHY registers are used for configuration, control
and status retrieval of the PHY module. The registers
are not directly accessible through the SPI interface;
they can only be accessed through Media Independent
Interface Management (MIIM) implemented in the
MAC.
Figure 3-1 shows the data memory organization for the
ENC28J60.
PHY Registers
Ethernet Buffer
ENC28J60
DS39662C-page 11
0000h
1FFFh
00h
1Fh