ENC28J60-I/ML Microchip Technology, ENC28J60-I/ML Datasheet - Page 67

• Manufacturer Part Number: ENC28J60-I/ML
• Description: IC ETHERNET CTRLR W/SPI 28QFN
• Manufacturer: Microchip Technology

Specifications of ENC28J60-I/ML

• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Type: Ethernet Controller, MAC/10Base-T
• Interface: SPI
• Voltage - Supply: 3.1 V ~ 3.6 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.1 V to 3.6 V
• Supply Current (max): 180 mA
• Package: 28QFN EP
• Standard Supported: IEEE 802.3
• Communication Mode: Full Duplex|Half Duplex
• Network Interface: MII|MIIM
• Data Rate: 10 Mbps
• Host Interface: SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 12-2:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
INTIE
INTIE: Global INT Interrupt Enable bit
1 = Allow interrupt events to drive the INT pin
0 = Disable all INT pin activity (pin is continuously driven high)
PKTIE: Receive Packet Pending Interrupt Enable bit
1 = Enable receive packet pending interrupt
0 = Disable receive packet pending interrupt
DMAIE: DMA Interrupt Enable bit
1 = Enable DMA interrupt
0 = Disable DMA interrupt
LINKIE: Link Status Change Interrupt Enable bit
1 = Enable link change interrupt from the PHY
0 = Disable link change interrupt
TXIE: Transmit Enable bit
1 = Enable transmit interrupt
0 = Disable transmit interrupt
Reserved: Maintain as ‘0’
TXERIE: Transmit Error Interrupt Enable bit
1 = Enable transmit error interrupt
0 = Disable transmit error interrupt
RXERIE: Receive Error Interrupt Enable bit
1 = Enable receive error interrupt
0 = Disable receive error interrupt
PKTIE
R/W-0
EIE: ETHERNET INTERRUPT ENABLE REGISTER
W = Writable bit
‘1’ = Bit is set
DMAIE
R/W-0
LINKIE
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
TXIE
R/W-0
r
x = Bit is unknown
ENC28J60
TXERIE
R/W-0
DS39662B-page 65
RXERIE
R/W-0
bit 0