LM4545VH National Semiconductor, LM4545VH Datasheet - Page 15

• Manufacturer Part Number: LM4545VH
• Description: IC AUDIO CODEC '97 18BIT 48LQFP
• Manufacturer: National Semiconductor
• Type: Audio Codec '97r

Specifications of LM4545VH

• Data Interface: Serial
• Resolution (bits): 18 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 90 / 89
• Voltage - Supply, Analog: 4.2 V ~ 5.5 V
• Voltage - Supply, Digital: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *LM4545VH

Application Information
Record Select Register (1Ah)
This register independently controls the source for the right
and left channel which will be recorded by the stereo ADC.
The default value is 0000h which corresponds to Mic in.
Record (Input) Gain Register (1Ch)
This register controls the Record (Input) Gain level for the
stereo input selected via the Record Select Control Register
(1Ah). The gain can be programmed from 0dB to +22.5dB in
1.5dB steps. The level for the left and right channel can be
individually controlled. The input can also be muted by set-
ting the MSB to 1.
SR2:SR0
Default: 8008h (mono regs.), 8808h (stereo regs.)
Default: 8000h
SL2:SL0
Mute
Mute
0
0
0
1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
0
1
Gx4:Gx0
Gx3:Gx0
XXXXX
00000
01000
01111
XXXX
1111
0000
Right Record Source
Left Record Source
Stereo Mix (R)
Stereo Mix (L)
Mono Mix (R)
Mono Mix (L)
Video In (R)
Video In (L)
Line In (R)
Line In (L)
Aux In (R)
Aux In (L)
CD In (R)
CD In (L)
Phone
Phone
Mic
Mic
34.5dB attenuation
22.5dB gain
+12dB gain
Function
Function
0dB gain
0dB gain
(Continued)
mute
mute
15
General Purpose Register (20h)
This register controls many miscellaneous functions imple-
mented on the LM4545. The miscellaneous functions in-
clude: POP which allows the PCM to bypass the National 3D
Sound circuitry, 3D which enables or disables the National
3D Sound circuitry, MIX which selects the MONO_OUT
source, MS which selects the microphone mux source and
LPBK which connects the output of the stereo ADC to input
of the stereo DAC. LPBK provides for a digital loopthru path
when enabled.
Powerdown Control / Status Register (26h)
This read/write register is used to monitor subsystem readi-
ness and program LM4545 powerdown states. The lower
half of this register is read only with a 1 indicated the sub-
section is ready. Writing to the lower 8 bits will have no effect.
When the AC Link Codec Ready indicator bit (SDATA_IN
slot 0, bit 15) is a 1 it indicates that the AC Link and AC ’97
registers are in a fully operational state. The AC ’97 Control-
ler must further probe the Powerdown Control / Status Reg-
ister to determine exactly which subsections are ready.
The supported powerdown modes are as follows.
Reserved Registers (28h - 7Ah)
Do not write to these registers as they are reserved.
LPBK
POP
DAC
ADC
PRO
REF
ANL
PR1
PR2
PR3
PR4
PR5
PR6
MIX
BIT
MS
BIT
BIT
3D
PCM in ADC’s and Input Mux powerdown
PCM out path and mute, 0 = pre 3D, 1 =
Analog Mixer powerdown (VREF still on)
Digital Interface (AC Link) powerdown
Analog Mixer powerdown (VREF off)
Mono output select 0 = Mix, 1 = Mic
ADC section ready to transmit data
National 3D Sound on / off 1 = on
DAC section ready to accept data
Mic select 0 = Mic1 1 = Mic2
PCM out DAC’s powerdown
Vref’s up to nominal level
Analog mixers ready
HP Amp powerdown
ADC/DAC loopback
Internal Clk disable
(external clk off)
Function
Function
Function
post 3D
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