ADV7202KST Analog Devices Inc, ADV7202KST Datasheet - Page 2

IC CODEC VIDEO 10BIT 64LQFP

ADV7202KST

Manufacturer Part Number
ADV7202KST
Description
IC CODEC VIDEO 10BIT 64LQFP
Manufacturer
Analog Devices Inc
Type
Video Codecr
Datasheet

Specifications of ADV7202KST

Rohs Status
RoHS non-compliant
Data Interface
Serial
Resolution (bits)
12, 10 b
Number Of Adcs / Dacs
1 / 4
Sigma Delta
No
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7202KST
Manufacturer:
CSR
Quantity:
1 000
Part Number:
ADV7202KSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
5 V SPECIFICATIONS
ADV7202–SPECIFICATIONS
Parameter
STATIC PERFORMANCE_DAC
VIDEO ADC
AUX ADC
DIGITAL INPUTS
DIGITAL OUTPUTS
ANALOG OUTPUTS
VOLTAGE REFERENCE
NOTES
1
2
3
Specifications subject to change without notice.
0°C to 70°C.
SHA gain = 1, half range for SHA gain = 2, see Table II.
Output delay measured from 50% of the rising edge of the clock to the 50% point of full-scale transition.
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
Resolution
Accuracy
Integral Nonlinearity
Differential Nonlinearity
Input Voltage Range
SNR
Resolution
Differential Nonlinearity
Integral Nonlinearity
Input Voltage Range
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Three-State Leakage Current
Output Capacitance
Digital Output Access Time, t
Digital Output Hold Time, t
Output Current Range
DAC-to-DAC Matching
Output Compliance, V
Output Impedance, R
Output Capacitance, C
Analog Output Delay
DAC Output Skew
Reference Range, V
Reference Range, V
Reference Range, V
REFDAC
REFADC
REFADC
2
3
IN
INL
OUT
INH
OC
OUT
OL
OH
IN
15
(AVDD/DVDD = 5 V
14
Min
–V
0
2
2.4
0
1.17
2.1
–1.5
4.10
REFADC
5%, V
Typ
10
10
± 0.6
–0.6/0.1 +0.5
12
12
± 2.5
± 0.7
62
57
8
± 0.4
± 0.4
6
10
6
5
4.33
3
50
30
5.5
0.06
1.235
2.2
1.1
REF
= 1.235 V, R
Max
+V
2 V
0.8
± 2
0.4
10
4.6
1.4
1.30
2.30
–2–
REFADC
REFADC
SET
= 1.2 k , all specifications T
Unit
Bits
Bits
LSB
LSB
Bits
Bits
LSB
LSB
dB
dB
Bits
LSB
LSB
V
V
V
µA
pF
V
V
µA
pF
ns
ns
mA
%
V
kΩ
pF
ns
ns
V
V
V
Test Conditions
10-Bit Operation
10-Bit Operation
(Including 2 Bits for Gain Ranging)
2.2 V Ref.
12 Bit
12 Bit
27 MHz Clock
54 MHz Clock
Guaranteed No Missing Codes
I
I
See Figure 13
R
I
Programmable 1.1 V or 2.2 V
SOURCE
SINK
OUT
SET
= 0 mA
= 1.2 kΩ, R
= 1.6 mA
MIN
to T
= 400 µA
MAX
1
, unless otherwise noted.)
L
= 300 Ω
REV. 0

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