MAX9853ETM+T Maxim Integrated Products, MAX9853ETM+T Datasheet - Page 42

• Manufacturer Part Number: MAX9853ETM+T
• Description: IC CODEC AUDIO STEREO 48TQFN
• Manufacturer: Maxim Integrated Products
• Type: Stereo Audior

Specifications of MAX9853ETM+T

• Data Interface: Serial
• Resolution (bits): 18 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 81.5 / 88
• Dynamic Range, Adcs / Dacs (db) Typ: 82 / 87.5
• Voltage - Supply, Analog: 2.6 V ~ 3.3 V
• Voltage - Supply, Digital: 1.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Stereo Audio CODECs with Microphone, DirectDrive
Headphones, Speaker Amplifiers, or Line Outputs
connected, HPR and HPL are pulled high by the inter-
nal sense bias. To detect the balanced mono configu-
ration, set HSTEST to 10 to enable Test 2. Test 2
connects a small pulldown current to HPR and a pullup
to HPL. A balanced mono speaker will result in HPL
pulled low whereas an open circuit would still allow
HPL to be pulled high by AV
the headphone configuration while the amplifiers are
active will lead to erroneous results as the outputs of
the active headphone amplifiers are biased at 0V.
In normal headset detect mode, the removal or inser-
tion of a jack, as monitored by EXTMICBIASL, triggers
an interrupt on the IRQ pin. The state changes that trig-
ger an interrupt are shown in Table 6. Alternatively, set
42
Table 5. Headphone Detect Test Modes
Figure 9. Headphone Detection Procedure
HSTEST(1:0)
ACTIVATE HEADSET
DETECT CIRCUITRY
HEADPHONE SENSE
______________________________________________________________________________________
HEADPHONES
00
01
10
11
PERFORM
HPR AND
STEREO
TEST 1
HPL
LOW
HIGH
Headphone sense bias disconnected
Headphone sense test 1 (standard
headphone detection)
Headphone sense test 2 (balanced mono
headphone detection)
Reserved
HEADPHONE SENSE
BALANCED MONO
HEADPHONES
PERFORM
TEST 2
HPL
CONFIGURATION
LOW
DD
. Attempting to detect
HIGH
HEADPHONES
NO
IHSD = 1 (register 0x02, bit B1) to cause all changes in
the HSDET bits to trigger an interrupt. Changes to
HSDET are digitally debounced with a 20ms filter.
Hardware interrupts are reported on the MAX9851/
MAX9853 open-drain IRQ pin. The interrupt pin can be
triggered by the sources shown in Table 7. When an
interrupt occurs, IRQ remains low until the interrupt is
serviced by reading the status register 0x00. If an
interrupt occurs, it will be reported only if the corre-
sponding interrupt enable is set in register 0x02 (see
the I
detailed register definitions).
Table 6. Headset Pin Changes Causing
Hardware Interrupts
Table 7. Sources of Hardware Interrupts
EXTMICBIASL: high
EXTMICBIASL: mid
EXTMICBIASL: low
EXTMICBIASL: low
Clip Detect
Slew Level Detect
Digital PLL UnLock
Headset Configuration Change
Headset Removal and Insertion
Speaker/External Fault
2
C Registers and Bit Descriptions section for
PIN-STATE CHANGE
INTERRUPT SOURCES
mid
high
low
low or mid
Headset inserted
Hook switch pressed
Hook switch released
Headset removed
Interrupt Output
REGISTER (0x02)
DESCRIPTION
MASKABLE IN
Yes
Yes
Yes
Yes
Yes
No