EMC1424-1-AIZL-TR SMSC, EMC1424-1-AIZL-TR Datasheet - Page 39
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EMC1424-1-AIZL-TR
Manufacturer Part Number
EMC1424-1-AIZL-TR
Description
Board Mount Temperature Sensors Quad Temp Snsr
Manufacturer
SMSC
Datasheet
1.EMC1423-1-AIZL-TR.pdf
(50 pages)
Specifications of EMC1424-1-AIZL-TR
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
SMSC EMC1423/EMC1424
2
0
0
0
1
2. Both Internal Diode and External Diode 1 read 71°C and External Diode 2 reads 68°C. Consecutive
3. The External Diode 1 reads 71°C and both the Internal Diode and External Diode 2 read 69°C.
4. The Internal Diode reads 71°C and both external diodes read 71°C. Consecutive alert counter for
5. The Internal Diode reads 71°C and both the external diodes read 71°C. Consecutive alert counter
Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled.
Bits 6-4 CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the
corresponding THERM Limit and Hardware Thermal Shutdown Limit before the SYS_SHDN pin is
asserted. All temperature channels use this value to set the respective counters. The consecutive
THERM counter is incremented whenever any of the measurements exceed the corresponding
THERM Limit or if the External Diode 1 measurement exceeds the Hardware Thermal Shutdown Limit.
If the temperature drops below the THERM limit or Hardware Thermal Shutdown Limit, then the
counter is reset. If the programmed number of consecutive measurements exceed the THERM Limit
or Hardware Thermal Shutdown Limit, and the appropriate channel is linked to the SYS_SHDN pin,
then the SYS_SHDN pin will be asserted low.
Once the SYS_SHDN pin is asserted, the consecutive THERM counter will not reset until the
corresponding temperature drops below the appropriate limit minus the corresponding hysteresis.
The bits are decoded as shown in
conversions.
Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of
limit condition or diode fault before the ALERT pin is asserted. All temperature channels use this value
to set the respective counters. The bits are decoded as shown in
consecutive out of limit conversion.
‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely
without the device resetting its SMBus protocol.
‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms,
then the device will reset the SMBus protocol.
alert counter for INT is incremented to 2 and for EXT1 is set to 1.
Consecutive alert counter for INT and EXT2 are cleared and EXT1 is incremented to 2.
INT is set to 1, EXT2 is set to 1, and EXT1 is incremented to 3.
for INT is incremented to 2, EXT2 is set to 2, and EXT1 is incremented to 4. The appropriate status
bits are set for EXT1 and the ALERT pin is asserted. EXT1 counter is reset to 0 and all other
counters hold the last value until the next temperature measurement.
1
0
0
1
1
Table 6.15 Consecutive Alert / THERM Settings
0
0
1
1
1
DATASHEET
Table
39
6.15. The default setting is 4 consecutive out of limit
NUMBER OF CONSECUTIVE OUT OF LIMIT
(default for CTHRM[2:0])
(default for CALRT[2:0])
MEASUREMENTS
Table
1
2
3
4
6.15. The default setting is 1
Revision 1.36 (07-02-09)