W681513SG Nuvoton Technology Corporation of America, W681513SG Datasheet
W681513SG
Specifications of W681513SG
Related parts for W681513SG
W681513SG Summary of contents
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SINGLE-CHANNEL VOICEBAND CODEC FOR USB W681513 APPLICATIONS Data Sheet Publication Release Date: October, 2005 - 1 - Revision A11 ...
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GENERAL DESCRIPTION W681513 is a single channel PCM CODEC with pin-selectable μ-Law or A-Law companding The dedicated to the USB accessory market by supporting a derivative 2MHz clock. The device is compliant with the ITU G.712 specification. It operates ...
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BLOCK DIAGRAM BCLKR BCLKR FSR PCMR BCLKT BCLKT BCLKT FST PCMT Pre -Scaler Pre -scaler MCLK MCLK 2000 kHz, Re Int PC cei erf M ve ace Tra Int PC ns erf M mit ace 512 kHz 256 kHz ...
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TABLE OF CONTENTS 1. GENERAL DESCRIPTION.................................................................................................................. 2 2. FEATURES ......................................................................................................................................... 2 3. BLOCK DIAGRAM .............................................................................................................................. 3 4. TABLE OF CONTENTS ...................................................................................................................... 4 5. PIN CONFIGURATION ....................................................................................................................... 6 6. PIN DESCRIPTION ............................................................................................................................. 7 7. FUNCTIONAL DESCRIPTION............................................................................................................ 8 7.1. Transmit Path ...
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ORDERING INFORMATION........................................................................................................... 33 14. VERSION HISTORY ....................................................................................................................... 34 Publication Release Date: October, 2005 - 5 - W681513 Revision A11 ...
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PIN CONFIGURATION RO+ RO+ PAI PAO- PAO FSR FSR PCMR BCLKR BCLKR PUI SINGLE SINGLE ...
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PIN DESCRIPTION Pin Pin Functionality Name No. RO+ 1 Non-inverting output of the receive smoothing filter. This pin can typically drive a 2 kΩ load to 1.575 volt peak referenced to the analog ground level. RO+ 2 Non-inverting output ...
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FUNCTIONAL DESCRIPTION W681513 is a single-rail, single channel PCM CODEC for voiceband applications. The CODEC complies with the specifications of the ITU-T G.712 recommendation. The CODEC also includes a complete μ-Law and A-Law compander. The μ-Law and A-Law companders ...
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AI+ is tied to V Table 7.1 When the input amplifier is powered down, the input signal AI- needs to be referenced to ...
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If the transmit power amplifier is not in use, it can be powered down by connecting PAI 7. OWER ANAGEMENT 7.3.1. Analog and Digital Supply The power supply for the analog ...
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HIGH for two consecutive falling edges of the bit-clock at the BCLKT pin. The length of the Frame Sync pulse can vary from frame to frame, as long as the positive frame sync edge occurs every 125 μsec. During ...
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Interchip Digital Link (IDL) The IDL interface mode is selected when the BCLKR pin is connected to V sync cycles. It can be used as a 2B+D timing interface in an ISDN application. The IDL interface consists of 4 ...
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TIMING DIAGRAMS T T FTRHM FTRSM MCLK FST T T FTRH FTRS BCLKT FDTD PCMT D7 D6 MSB FSR T T FRRH FRRS BCLKR PCMR D7 D6 MSB T DRS T T ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS T FST / FSR Minimum LOW Width FSL 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR HIGH Pulse Width BCKH T BCLKT, BCLKR LOW Pulse Width BCKL T BCLKT 0 Falling Edge to ...
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FTRHM FTRSM MCKH MCLK T FTFH T FTFS FST T T FTRS FTRH BCLKT - BDTD PCMT D7 D6 MSB T FRFH T FRFS FSR T T FRRS FRRH BCLKR - ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR HIGH Pulse Width BCKH T BCLKT, BCLKR LOW Pulse Width BCKL T BCLKT –1 Falling Edge to FST Rising Edge Hold FTRH Time T FST ...
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FST T FSFH T T FSRH FSRS BCLKT - BDTD PCMT MSB T T DRS PCMR MSB BCH ...
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FST T FSFH T T FSRH FSRS BCLKT ...
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SYMBOL DESCRIPTION 1/T Master Clock Frequency MCK T / MCLK Duty Cycle MCKH T Operation MCK T Minimum Pulse MCKH MCLK(512 kHz or Higher) T Minimum Pulse Width LOW for MCLK MCKL (512 kHz or Higher) T MCLK falling Edge ...
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ABSOLUTE MAXIMUM RATINGS 9. BSOLUTE AXIMUM Condition Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA Stresses above those ...
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ELECTRICAL CHARACTERISTICS 10. ENERAL ARAMETERS Symbol Parameters V Input LOW Voltage IL V Input HIGH Voltage IH V PCMT Output LOW Voltage OL V PCMT Output HIGH Voltage OH V Current (Operating) - ADC + DAC I ...
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NALOG IGNAL EVEL AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred MCLK=BCLK= 2MHz; FST=FSR=8 kHz synchronous operation PARAMETER SYM. Absolute L 0 dBm0 = 0dBm ...
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A D NALOG ISTORTION AND =5V ±10 =0V MCLK=BCLK= 2MHz; FST=FSR=8 kHz synchronous operation PARAMETER SYM. Total Distortion vs. D LTμ Level Tone (1020 Hz, μ-Law, C-Message Weighted) Total Distortion vs. D LTA Level ...
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A I NALOG NPUT AND =5V ±10 =0V PARAMETER AI Input Offset Voltage AI Input Current AI Input Resistance AI Input Capacitance AI Common Mode Input Voltage Range AI Common Mode Rejection Ratio AI ...
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PARAMETER PO Output Current PO Output Resistance PO Differential Gain PO Differential Signal to Distortion C-Message weighted PO Power Supply Rejection Ratio ( kHz Differential out) SYM. CONDITION 0.5 ≤AO,RO+≤ -0.5 OUTPO ...
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D I/O IGITAL 10.5.1. μ-Law Encode Decode Characteristics Normalized Encode Decision D7 D6 Levels Sign Chord 8159 1 0 7903 : 4319 1 0 4063 : 2143 1 0 2015 : 1055 1 0 991 : 511 1 0 ...
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A-Law Encode Decode Characteristics Normalized Encode D7 D6 Decision Sign Chord Levels 4096 1 0 3968 : 2048 1 0 2048 : 1088 1 0 1024 : 544 1 0 512 : 272 1 0 256 : 136 1 ...
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PCM Codes for Zero and Full Scale Level Sign bit Chord bits (D7) (D6,D5,D4) + Full Scale 1 + Zero 1 - Zero 0 - Full Scale 0 10.5.4. PCM Codes for 0dBm0 Output Sample Sign bit Chord bits ...
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TYPICAL APPLICATION CIRCUITS 22uF 1.5K 3.9K 1.0uF select MICROPHONE 3.9K 1.0uF 1.5K 3K SPEAKER VCC 1K 330pF U1 62K AI- 19 AI+ 62K 20 VAG 1 RO+ 330pF 2 RO+ 20K 3 PAI 4 PAO- 5 ...
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SUGGESTED COMPONENT VALUES BY APPLICATION COMPONENT # In the handset application the gain from the handset microphone is set to 27 for the input amplifier. This is because the acoustical chamber in the telephone type handset lets the ...
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Signal-to-Noise Ratio (SNR) has decreased and the signal sounds noisier. On the receive side, the gain is set as in the previous example. When the Power ...
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PACKAGE SPECIFICATION 12.2. 20L SOP (SOG)-300 SMALL OUTLINE PACKAGE (SAME AS SOG & SOIC) DIMENSIONS SEATING PLANE SYMBOL MIL ...
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... When ordering W681513 series devices, please refer to the following part numbers. Winbond Part Number Description Package Material: Standard Package Blank = Pb-free Package G = Package Type: = 20-Lead Plastic Small Outline Package (SOG/SOP) S Part Number W681513S W681513SG - 33 - W681513 Publication Release Date: October, 2005 Revision A11 ...
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VERSION HISTORY VERSION DATE PAGE A3 October 1, 2003 A10 April 2005 A11 October, 2005 Various 22, 23 29-31 First published version 33 Add Important Notice 2 Added reference to Pb-free RoHS packaging and to V Capitalized logic HIGH/LOW ...
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Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other ...