CS4272-DZZ Cirrus Logic Inc, CS4272-DZZ Datasheet - Page 44

IC CODEC 24BIT 114DB 28-TSSOP

CS4272-DZZ

Manufacturer Part Number
CS4272-DZZ
Description
IC CODEC 24BIT 114DB 28-TSSOP
Manufacturer
Cirrus Logic Inc
Type
Stereo Audior
Datasheets

Specifications of CS4272-DZZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
114 / 114
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.1 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
3
No. Of Output Channels
3
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
114dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1004 - EVAL BOARD CS4272 STEREO CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS4272-DZZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
CS4272-DZZR
Manufacturer:
TI
Quantity:
12
8.7.3
8.7.4
8.7.5
8.8
8.8.1
8.8.2
44
PART3
B7
Chip ID - Register 08h
Function:
Function:
Function:
This is a Read-Only register.
Function:
Function:
Freeze (Bit 2)
Control Port Enable (Bit 1)
Power Down (Bit 0)
Chip ID (Bits 7:4)
Chip Revision (Bits 3:0)
This function allows modifications to the control port registers without the changes taking effect until
FREEZE is disabled. To make multiple changes in the Control Port registers take effect simultaneous-
ly, set the FREEZE bit, make all register changes, then clear the FREEZE bit.
This bit is cleared by default, allowing the device to power-up in Stand-Alone Mode. Control Port
Mode can be accessed by setting this bit. This will allow the operation of the device to be controlled
by the registers and the pin definitions will conform to Control Port Mode. See “Recommended Power-
Up Sequence - Access to Control Port Mode” on page 27.
The device will enter a low-power state whenever this bit is set. The power-down bit is set by default
and must be cleared before normal operation in Control Port Mode can occur. The contents of the
control registers are retained when the device is in power-down.
Chip ID code for the CS4272. Permanently set to 0000b (0h).
Chip Revision code for the CS4272.
Revision A is coded as 0000b (0h).
Revision B is coded as 0000b (0h).
PART2
B6
PART1
B5
PART0
B4
REV3
B3
REV2
B2
REV1
B1
CS4272
REV0
DS593F1
B0

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