ADAU1381BCPZ Analog Devices Inc, ADAU1381BCPZ Datasheet - Page 51

• Manufacturer Part Number: ADAU1381BCPZ
• Description: IC AUDIO CODEC STEREO LN 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Stereo Audior

Specifications of ADAU1381BCPZ

• Data Interface: Serial, SPI™
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 100
• Dynamic Range, Adcs / Dacs (db) Typ: 96.5 / 100
• Voltage - Supply, Analog: 1.8 V ~ 3.65 V
• Voltage - Supply, Digital: 1.63 V ~ 3.65 V
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 100dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register 16399 (0x400F), Record Gain Right PGA
The record gain right PGA control register controls the right
channel input PGA. This register configures the input for either
differential or single-ended signals and sets the right channel
input recording volume.
Bits[7:5], Right Input Gain
These bits set the right channel analog microphone input PGA gain.
Bit 2, Single-Ended Right Input Enable
If this bit is high (enabled), a single-ended input can be input on
the RMIC pin and gained by the PGA. The positive differential
Table 38. Record Gain Right PGA Register
Bits
[7:5]
[4:3]
2
1
0
Description
Right input gain
000: 0 dB
001: 6 dB
010: 10 dB
011: 14 dB
100: 17 dB
101: 20 dB
110: 26 dB
111: 32 dB
Reserved
Single-ended right input enable
0: disabled
1: enabled
Record path right mute
0: muted
1: unmuted
Right PGA enable
0: disabled
1: enabled
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input pin (RMICP) is disabled, and the complementary input of
the PGA is switched to common mode.
Bit 1, Record Path Right Mute
This bit mutes the entire right channel input PGA.
Bit 0, Right PGA Enable
This bit enables the right channel PGA.
Default
000
0
0
0
ADAU1381