MAX6652AUB Maxim Integrated Products, MAX6652AUB Datasheet - Page 8

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MAX6652AUB

Manufacturer Part Number
MAX6652AUB
Description
Board Mount Temperature Sensors
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX6652AUB

Full Temp Accuracy
+/- 2 C
Package / Case
uSOP
Digital Output - Bus Interface
Serial (2-Wire)
Digital Output - Number Of Bits
7 bit + Sign
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Output Type
Digital
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX6652AUB
Manufacturer:
MAXIM/美信
Quantity:
20 000
Part Number:
MAX6652AUB+
Manufacturer:
STM
Quantity:
2 028
Setting bit 0 in the configuration register to 0 stops the
monitoring loop and puts the MAX6652 into low-power
shutdown mode. In this mode, the I
SMBus interface remains active, and the supply current
drops to 10µA or less.
The MAX6652 power-on reset supply (POR) voltage is
typically 2V. Below this supply voltage, all registers are
reset, the device is put into shutdown mode, and the
I
Two registers, a hot temperature limit (T
a hot temperature hysteresis (T
alarm threshold data (Table 1). If a measured tempera-
ture exceeds the value of T
Alerts are cleared and reasserted depending on the
interrupt mode selected in the temperature configura-
tion register (see ALERT Interrupts).
The POR state of the T
+80°C. The POR state of the T
0001 or +65°C.
High and low limits for the voltage inputs are stored in
registers 2Bh through 32h. If a measured voltage is
less than V
asserted.
The POR states of the high- and low-voltage limits are
1.1 and 0.9 times the nominal voltage for each input,
respectively.
The interrupt status register records temperature or
voltage fault conditions whenever a limit is exceeded
Temperature Sensor and System Monitor
in a 10-Pin µMAX
Table 6. Interrupt Mask Register (Address 43h, Power-Up Default = 00h)
8
2
C-compatible/SMBus interface is inactive.
5, 6, 7
BIT
_______________________________________________________________________________________
0
1
2
3
4
LOW
Tem p er atur e
Reserved
Interrupt Status Byte Functions
NAME
2.5V
3.3V
5.0V
12V
or greater than V
Low-Power Shutdown Mode
Alarm Threshold Registers
HOT
Power-On Reset (POR)
HOT
READ/WRITE
register is 0101 0000 or
, an ALERT is asserted.
R/W
R/W
R/W
R/W
R/W
HYST
HYST
HIGH
register is 0100
HOT
2
) at 3Ah, store
C-compatible/
, an ALERT is
) at 39h and
Setting the bit to 1 disables the interrupt status register bit (bit 0) and the ALERT
output for the 2.5V
Setting the bit to 1 disables the interrupt status register bit (bit 1) and the ALERT
output for the 12V
Setting the bit to 1 disables the interrupt status register bit (bit 2) and the ALERT
output for the 3.3V
Setting the bit to 1 disables the interrupt status register bit (bit 3) and the ALERT
output for the V
Setting the bit to 1 disables the interrupt status register bit (bit 4) and the ALERT
output for temperature.
CC
IN
IN
IN
(Table 5). Bits 0 through 3 correspond to the 2.5V, 12V,
3.3V, and 5V internal V
responds to the temperature. If a threshold has been
crossed, the appropriate bit will contain a 1. In the
default and one-time interrupt modes, reading the sta-
tus register clears the register until a new out-of-range
condition is detected.
An out-of-range voltage or temperature causes the
ALERT output signal to be asserted. However, if the
assertion is caused by an out-of-range temperature, the
ALERT output can operate in one of three different
modes: default, one-time interrupt, and comparator
modes. The ALERT signal can be cleared only by read-
ing the interrupt status register (Table 5), except when
the ALERT has been activated by an out-of-range tem-
perature in comparator mode. In this case, ALERT is
only cleared when the fault is removed. Reading the
interrupt status register also clears this register, except
for bit 4 in comparator mode. Unless the fault is
removed, ALERT will be reasserted after the next con-
version cycle. The ALERT output can also be masked
by writing to the appropriate bits in the interrupt mask
register (Table 6) or by setting bit 1 of the configuration
register (Table 4) to 0.
The interrupt does not halt conversions. New tempera-
ture and voltage data continue to be available over the
I
ed. The three temperature ALERT modes are illustrated
in Figure 1 and are selected through the temperature
configuration register (Table 7). The ALERT output pin
is open drain, so the device can share a common inter-
rupt line.
input.
2
C-compatible/SMBus interface after ALERT is assert-
input.
input.
input.
DESCRIPTION
CC
voltage inputs, and bit 4 cor-
ALERT Interrupts

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