CS42438-DMZ Cirrus Logic Inc, CS42438-DMZ Datasheet - Page 27
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CS42438-DMZ
Manufacturer Part Number
CS42438-DMZ
Description
IC CODEC 108DB 192KHZ 52-MQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet
1.CS42438-CMZ.pdf
(61 pages)
Specifications of CS42438-DMZ
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
6 / 8
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 108 (Differential), 102 / 105 (Single-Ended)
Voltage - Supply, Analog
3.14 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
52-MQFP, 52-PQFP
Audio Codec Type
Stereo
No. Of Adcs
6
No. Of Dacs
8
No. Of Input Channels
6
No. Of Output Channels
8
Adc / Dac Resolution
24bit
Sampling Rate
200kSPS
Ic Interface Type
I2C
Package
52MQFP
Adc/dac Resolution
24 Bit
Number Of Channels
6ADC /8 DAC
Number Of Adcs
6
Number Of Dacs
8
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1500 - BOARD EVAL FOR CS42438 CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1614
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
CS42438-DMZ
Manufacturer:
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Quantity:
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CS42438-DMZ
Manufacturer:
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DS646F2
5.2
5.2.1
AIN6 Multiplexer
DAC Volume Control/Mute/Invert
ADC Volume Control
DAC Soft Ramp/Zero Cross
ADC Soft Ramp/Zero Cross
DAC Auto-Mute
Status Interrupt
Analog Inputs
5.2.1.1
AIN Volume Control and ADC Overflow status are not accessible in Hardware Mode. Single-ended oper-
ation is only supported for ADC3. See
5.2.1.2
Line-Level Inputs
AINx+ and AINx- are the line-level differential analog inputs internally biased to VQ, approximately VA/2.
Figure 9 on page 28
ended signals on all inputs, AIN1-AIN
filters.
For single-ended operation on ADC1-ADC
Control & DAC De-Emphasis (Address 05h)” on page 44
page 50
The gain/attenuation of the signal can be adjusted for each AINx independently through the
Control (Address 11h-16h)” on page
puts above positive full scale or below negative full scale, the ADC will output 7FFFFFH or 800000H, re-
spectively, and cause the ADC Overflow bit in the register
to be set to a ‘1’.
Function
for required external components).
Hardware Mode
Software Mode
Table 2. Hardware Configurable Settings (Continued)
shows the full-scale analog input levels. The CS42438 also accommodates single-
Hardware Mode Feature Summary
AIN6B when ADC3 in Single-
Selects between AIN6A and
All DAC Volume = 0 dB, un-
Default Configuration
All ADC Volume = 0 dB
muted, not inverted
Immediate Change
Immediate Change
48. The ADC output data is in 2’s complement binary format. For in-
6
Section
Ended Mode
. See
Enabled
3
N/A
(AIN1 to AIN
“ADC Input Filter” on page 50
5.2.2.
“Status (Address 19h) (Read Only)” on page 49
6
), the ADCx_SINGLE bit in the register
must be set appropriately (see
Hardware Control
“AIN6_MUX” pin 2
-
-
-
-
-
-
for the recommended input
see
-
-
-
-
-
-
“AINX Volume
Section 5.2.2
CS42438
Figure 21 on
Note
“ADC
27