CS42438-CMZ Cirrus Logic Inc, CS42438-CMZ Datasheet - Page 45
![IC CODEC 108DB 192KHZ 52-MQFP](/photos/6/80/68086/cs42438-cmz_sml.jpg)
CS42438-CMZ
Manufacturer Part Number
CS42438-CMZ
Description
IC CODEC 108DB 192KHZ 52-MQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Specifications of CS42438-CMZ
Package / Case
52-MQFP, 52-PQFP
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
6 / 8
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 108 (Differential), 102 / 105 (Single-Ended)
Voltage - Supply, Analog
3.14 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
-55°C ~ 150°C
Mounting Type
Surface Mount
Number Of Adc Inputs
6
Number Of Dac Outputs
8
Conversion Rate
192 KSPS
Interface Type
Serial (I2S, SPI)
Resolution
24 bit
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 10 C
Number Of Channels
6 ADC/8 DAC
Thd Plus Noise
- 98 dB ADC / - 98 dB DAC, - 95 dB ADC / - 95 dB DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1500 - BOARD EVAL FOR CS42438 CODEC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1032
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS42438-CMZ
Manufacturer:
LT
Quantity:
413
Company:
Part Number:
CS42438-CMZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Company:
Part Number:
CS42438-CMZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS646F2
7.6.6
7.6.7
7.6.8
7.7
7.7.1
DAC_SNGVOL
7
Transition Control (Address 06h)
Function:
When enabled, this bit allows the user to apply a single-ended input to the positive terminal of ADC2. A
+6 dB digital gain is automatically applied to the serial audio data of ADC2. The negative leg must be driv-
en to the common mode of the ADC. See
ADC3 Single-Ended Mode (ADC3 SINGLE)
Default = 0
0 - Disabled; Differential input to ADC
1 - Enabled; Single-Ended input to ADC
Function:
When disabled, this bit removes the 4:2 multiplexer from the signal path of ADC3 allowing a differential
input. When enabled, this bit allows the user to choose between four single-ended inputs to ADC3, using
the AIN5_MUX and AIN6_MUX bits. See
descriptions.
Analog Input Ch. 5 Multiplexer (AIN5_MUX)
Default = 0
0 - Single-Ended Input AIN5A
1 - Single-Ended Input AIN5B
Function:
ADC3 can accept single-ended input signals when the ADC3 SINGLE bit is enabled. The AIN5_MUX bit
selects between two input channels (AIN5A or AIN5B) to be sent to ADC3 in Single-Ended Mode. This bit
is ignored when the ADC3_SINGLE bit is disabled. See
Analog Input Ch. 6 Multiplexer (AIN6_MUX)
Default = 0
0 - Single-Ended Input AIN6A
1 - Single-Ended Input AIN6B
Function:
ADC3 can accept a single-ended input signal when the ADC3 SINGLE bit is enabled. The AIN6_MUX bit
selects between two input channels (AIN6A or AIN6B) to be sent to ADC3 in Single-Ended Mode. This bit
is ignored when the ADC3_SINGLE bit is disabled. See
Single Volume Control (DAC_SNGVOL, ADC_SNGVOL)
Default = 0
Function:
DAC_SZC1
6
DAC_SZC0
5
AMUTE
4
Figure 21 on page 50
Figure 12 on page 32
MUTE ADC_SP
3
Figure 12 on page 32
Figure 12 on page 32
ADC_SNGVOL
for a graphical description.
and
Figure 21 on page 50
2
for a graphical description.
for a graphical description.
ADC_SZC1
1
CS42438
for graphical
ADC_SZC0
0
45