MMA8125EG Freescale Semiconductor, MMA8125EG Datasheet - Page 7
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MMA8125EG
Manufacturer Part Number
MMA8125EG
Description
Board Mount Accelerometers SOURCE ONLY
Manufacturer
Freescale Semiconductor
Series
MMA81r
Datasheet
1.MMA8110EG.pdf
(47 pages)
Specifications of MMA8125EG
Sensing Axis
Z
Acceleration
250 g
Sensitivity
1.6 mV/g
Package / Case
SOIC-16 Wide
Axis
Z
Acceleration Range
±250g
Voltage - Supply
6.3 V ~ 30 V
Output Type
Digital
Bandwidth
-
Interface
SPI
Mounting Type
Surface Mount
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Sensors
Freescale Semiconductor
1.4
form a filter network for the internal voltage regulator. Two capacitors are shown for redundancy; this configuration improves
reliability in the event of an open capacitor connection. A single 1 μF capacitor may be used in place of C1 and C2, however
connection from the capacitor to both CREG pins is required. CHOLD stores energy during signal transitions on BUSIN and
BUSOUT. The value of this capacitor is typically 1 μF; however, this depends upon data rates and bus utilization.
1.5
Thirty-two OTP bits are factory-programmed with a unique serial number during the manufacturing and test. Five additional bits
are factory-programmed to indicate the full-scale range and axis of sensitivity. Device identification data may be read at any time
while the device is active.
NOTE: LEAVE OPEN OR CONNECT TO SIGNAL MONITOR.
MMA81XXEG/MMA82XXEG/MMA82XXTEG
A typical satellite module configuration supporting daisy-chain configuration is shown in
MODULE INTERCONNECT
DEVICE IDENTIFICATION
GROUND-LOSS DETECTION DISABLED
1
2
3
4
5
6
7
8
SEE NOTE
N/C
N/C
C
V
C
D
V
CLK
PP
GND
REG
FIL
OUT
/TEST
/D
IN
BUSRTN
BUSOUT
C1
1 μF
BUSIN
C
H
V
V
V
REG
CAP
SS
SS
SS
MMA81XXEG/MMA82XXEG/MMA82XXTEG
16
15
14
13
12
11
10
9
N/C
Figure 1-6. Typical Satellite Module Diagram
Figure 1-5. V
1
2
3
4
5
6
7
8
N/C
N/C
C
V
C
D
V
CLK
PP
GND
BUSRTN
REG
FIL
OUT
/TEST
/D
IN
GND
BUSOUT
BUSRTN
/D
BUSIN
MMA81XXEG/MMA82XXEG/MMA82XXTEG
IN
C
H
V
V
V
REG
Connection Options
CAP
SS
SS
SS
1 nF
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
N/C
N/C
C
V
C
D
V
CLK
GROUND-LOSS DETECTION ENABLED
1.00 kΩ, 1%
C2
1 μF
PP
GND
REG
FIL
OUT
(SINGLE-ENDED SYSTEMS ONLY)
/TEST
/D
IN
BUSOUT
BUSRTN
C
BUSIN
HOLD
C
H
V
V
V
REG
CAP
Figure
SS
SS
SS
16
15
14
13
12
11
10
9
1-6. Capacitors C1 and C2
BUSIN
BUSOUT
BUSRTN
MMA81XXEG
BUSRTN
CHASSIS
7