RTPXA270C5C312 Intel, RTPXA270C5C312 Datasheet - Page 32
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RTPXA270C5C312
Manufacturer Part Number
RTPXA270C5C312
Description
IC MPU 32BIT 312MHZ 356-PBGA
Manufacturer
Intel
Datasheet
1.NHPXA270C5C312.pdf
(126 pages)
Specifications of RTPXA270C5C312
Processor Type
XScale®
Speed
312MHz
Voltage
1.25V
Mounting Type
Surface Mount
Package / Case
356-PBGA
For Use With
460-3472 - KIT DEV ZOOM STARTER FOR PXA270
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
868403
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
RTPXA270C5C312
Manufacturer:
MARVEL
Quantity:
298
Part Number:
RTPXA270C5C312
Manufacturer:
MARVEL
Quantity:
20 000
Intel® PXA270 Processor
Pin Listing and Signal Definitions
4-12
VF-BGA
NOTE: Refer to
(13x13)
AC10
Ball#
AB10
AC5
AC7
AC9
AD6
AC4
AD7
AD3
AA3
AB1
AB4
AB5
AA6
AB9
AB7
AB8
U4
Y2
Y3
C9
B3
A3
B9
Table 4-1. Pin Usage Summary (Sheet 3 of 17)
(23x23)
PBGA
Ball#
AA4
AA3
AA7
AB6
AB7
AA5
AB3
AB5
AB4
W3
W4
W6
W8
W7
U3
Y1
U4
Y4
Y8
C8
D6
A4
D9
T4
Table 4-2
SDCLK<0
SDCLK<1
SDCLK<2
NSDRAS
NSDCAS
GPIO<15
GPIO<18
DQM<0>
DQM<1>
DQM<2>
DQM<3>
NSDCS<
NSDCS<
RDNWR
NCS<0>
SDCKE
MD<5>
MD<4>
MD<3>
MD<2>
MD<1>
MD<0>
Name
NWE
NOE
0>
1>
>
>
>
>
>
for Numbered Notes on Reset and Sleep States.
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
Type
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OCZ
OC
OC
OC
OC
Z
Z
Z
Z
Z
Z
Z
Z
nSDCS<0>
nSDCS<1>
SDCLK<0>
SDCLK<1>
SDCLK<2>
GPIO<15>
GPIO<18>
Function
DQM<0>
DQM<1>
DQM<2>
DQM<3>
nSDRAS
nSDCAS
RDnWR
nCS<0>
SDCKE
MD<5>
MD<4>
MD<3>
MD<2>
MD<1>
MD<0>
Reset
After
nWE
nOE
nSDCS<0>
nSDCS<1>
SDCLK<0>
SDCLK<1>
SDCLK<2>
nPCE<1>
Function
nSDRAS
nSDCAS
DQM<0>
DQM<1>
DQM<2>
DQM<3>
Primary
RDnWR
nCS<0>
SDCKE
MD<5>
MD<4>
MD<3>
MD<2>
MD<1>
MD<0>
nWE
RDY
nOE
—
—
Electrical, Mechanical, and Thermal Specification
Secondary
Alternate
Function
Table 4-4
nCS<1>
Refer to
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Alternate
Function
Third
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Note[1]
Note[1]
Reset
State
Pu-1
Pd-0
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Table 4-4
Note [3]
Note[4]
Sleep
State