GCIXP1240AC Intel, GCIXP1240AC Datasheet - Page 13

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GCIXP1240AC

Manufacturer Part Number
GCIXP1240AC
Description
IC MPU NETWORK 232MHZ 432-BGA
Manufacturer
Intel
Datasheets

Specifications of GCIXP1240AC

Rohs Status
RoHS non-compliant
Processor Type
Network
Features
32-bit StrongARM RISC Core
Speed
232MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
432-BGA
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Other names
837152

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8.
Problem:
Implication:
Workaround:
Status:
Specification Update
Note: The read operation must immediately follow the write to the CSR.
PCI CSR Corruption
The PCI CSRs will be corrupted by any write access to the PCI memory space, PCI IO space, or
PCI config space from the StrongARM* core to the PCI, if the previous transaction was a CSR
write to registers in the PCI unit.
The affected address ranges are:
The problem is dependent on the sequence of StrongARM* core transactions described above, and
is not dependent on the time between these transactions.
Erratic behavior of PCI operations. The address of the register (PCI CSR) that gets corrupted
during the PCI memory access equals the lower address bits of the PCI memory transaction.
Always follow a write operation from the StrongARM* core to any CSR within the PCI block by a
read to a register within the PCI.
The following is an example of a CSR read to the PCI_ADDR_EXTENSION 4200 0140h. Apart
from the device driver writing to PCI, VxWorks also writes to PCI timer registers. To get around
this:
NoFix
1. Insert the following piece of code into the header file IXP1240eb.h located in the IXP1240
2. Define the compiler directive PCI_WORKAROUND, either in your project build settings or
3. Rebuild the VxWorks image. Refer to the README file entitled Building the VxWorks BSP,
PCI memory space (6000 0000 - 7FFF FFFF)
PCI I/O space (5400 0000 - 5400 FFFF)
PCI config space 0 and 1 (5200 0000 - 53BF FFFF)
Developer’s Workbench software installation in the directory
Boardsupport\VxWorks\IXP1240EB.
#ifdef PCI_WORKAROUND
#define AMBA_TIMER_WRITE(reg, data) ({\
__asm__ __volatile (""); \
(*((volatile UINT32 *)(reg)) = (data)); \
((void)*(volatile UINT32 *)(IXP1240_PCI_ADDR_EXT)); \
__asm__ __volatile (""); })
#endif
as a #define in the header file. Without this directive, the compiler may reorder the
instructions.
for directions on how to build the image.
Intel
®
IXP1240 Network Processor
Errata
13

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