KU80L188EC13 Intel, KU80L188EC13 Datasheet - Page 52
![IC MPU 16-BIT 3V 13MHZ 100-QFP](/photos/6/79/67992/qfp100-g1_pkg_sml.jpg)
KU80L188EC13
Manufacturer Part Number
KU80L188EC13
Description
IC MPU 16-BIT 3V 13MHZ 100-QFP
Manufacturer
Intel
Datasheet
1.SB80L188EC16.pdf
(57 pages)
Specifications of KU80L188EC13
Rohs Status
RoHS non-compliant
Processor Type
80L188
Features
EC suffix, 16-Bit, Extended Temp
Speed
13MHz
Voltage
3V
Mounting Type
Surface Mount
Package / Case
100-QFP
Other names
806192
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KU80L188EC13
Manufacturer:
INTEL
Quantity:
1 831
Company:
Part Number:
KU80L188EC13
Manufacturer:
INTEL
Quantity:
455
80C186EC 188EC 80L186EC 188EC
INSTRUCTION SET SUMMARY
DATA TRANSFER (Continued)
SEGMENT
CS
SS
DS
ES
ARITHMETIC
ADD
Reg memory with register to either
Immediate to register memory
Immediate to accumulator
ADC
Reg memory with register to either
Immediate to register memory
Immediate to accumulator
INC
Register memory
Register
SUB
Reg memory and register to either
Immediate from register memory
Immediate from accumulator
SBB
Reg memory and register to either
Immediate from register memory
Immediate from accumulator
DEC
Register memory
Register
CMP
Register memory with register
Register with register memory
Immediate with register memory
Immediate with accumulator
NEG
AAA
DAA
AAS
DAS
MUL
Register-Byte
Register-Word
Memory-Byte
Memory-Word
Shaded areas indicate instructions not available in 8086 8088 microsystems
NOTE
52
Clock cycles shown for byte transfers for word operations add 4 clock cycles for all memory transfers
e
e
e
e
e
e
e
e
e
e
e
e
e
Increment
Subtract
Subtract with borrow
Add with carry
Decrement
Change sign register memory
ASCII adjust for subtract
Decimal adjust for subtract
Multiply (unsigned)
Add
Compare
ASCII adjust for add
Decimal adjust for add
e
Segment Override
Function
0 1 0 0 0 reg
0 1 0 0 1 reg
0 0 0 0 0 0 d w
1 0 0 0 0 0 s w
0 0 0 0 0 1 0 w
0 0 0 1 0 0 d w
1 0 0 0 0 0 s w
0 0 0 1 0 1 0 w
1 1 1 1 1 1 1 w
0 0 1 0 1 0 d w
1 0 0 0 0 0 s w
0 0 1 0 1 1 0 w
0 0 0 1 1 0 d w
1 0 0 0 0 0 s w
0 0 0 1 1 1 0 w
1 1 1 1 1 1 1 w
0 0 1 1 1 0 1 w
0 0 1 1 1 0 0 w
1 0 0 0 0 0 s w
0 0 1 1 1 1 0 w
1 1 1 1 0 1 1 w
1 1 1 1 0 1 1 w
0 0 1 0 1 1 1 0
0 0 1 1 0 1 1 0
0 0 1 1 1 1 1 0
0 0 1 0 0 1 1 0
0 0 1 1 0 1 1 1
0 0 1 0 0 1 1 1
0 0 1 1 1 1 1 1
0 0 1 0 1 1 1 1
(Continued)
mod 0 0 0 r m
mod 0 1 0 r m
mod 0 0 0 r m
mod 1 0 1 r m
mod 0 1 1 r m
mod 0 0 1 r m
mod 1 1 1 r m
mod 0 1 1 r m
mod 100 r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
data
data
data
data
data
Format
data if w
data if w
data if w
data if w
data if w
data
data
data
data
data
e
e
e
e
e
1
1
1
1
1
data if s w
data if s w
data if s w
data if s w
data if s w
e
e
e
e
e
01
01
01
01
01
80C186EC
Cycles
26–28
35–37
32–34
41–43
Clock
3 10
4 16
3 10
4 16
3 15
3 10
4 16
3 10
4 16
3 15
3 10
3 10
3 10
3 10
3 4
3 4
3 4
3 4
3 4
2
2
2
2
3
3
8
4
7
4
80C188EC
41–43
Cycles
26–28
35–37
32–34
Clock
3 10
4 16
3 10
4 16
3 15
3 10
4 16
3 10
4 16
3 15
3 10
3 10
3 10
3 10
3 4
3 4
3 4
3 4
3 4
2
2
2
2
3
3
8
4
7
4
Comments
8 16-bit
8 16-bit
8 16-bit
8 16-bit
8 16-bit