MC68040RC40V Freescale Semiconductor, MC68040RC40V Datasheet - Page 83
MC68040RC40V
Manufacturer Part Number
MC68040RC40V
Description
IC MICROPROCESSOR 32BIT 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68EC040FE33A.pdf
(442 pages)
Specifications of MC68040RC40V
Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Freescale Semiconductor, Inc.
MC68030 and MC68851 cause F-line unimplemented instruction exceptions if executed in
either supervisor or user mode by the M68040.
3.7.4 Register Programming Considerations
If the entries in the ATCs are no longer valid when a reset operation occurs (as is normally
expected), an explicit flush operation must be specified by the system software. The
assertion of RSTI disables translation by clearing the E-bits of the TCR, DTTRx, and
ITTRx, but it does not flush the ATCs. Reading or writing any of the MMU registers (URP,
SRP, TCR, MMUSR, DTTR0, DTTR1, ITTR0, ITTR1) does not flush the ATCs. Since a
write to these registers can cause some or all the address translations to change, the write
should be followed by a PFLUSH operation to flush the ATCs if necessary.
The status bits in the MMUSR indicate conditions to which the operating system should
respond. In a typical access error exception handler, the flowchart illustrated in Figure
3-23 can be used to determine the cause of an MMU fault. The PTEST instruction sets
the bits in the MMUSR appropriately, and the program can branch to the appropriate code
segment for the condition.
3-34
M68040 USER'S MANUAL
MOTOROLA
For More Information On This Product,
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