XPC8260CZUIFBC Freescale Semiconductor, XPC8260CZUIFBC Datasheet - Page 12

IC MPU POWERQUICC II 480-TBGA

XPC8260CZUIFBC

Manufacturer Part Number
XPC8260CZUIFBC
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of XPC8260CZUIFBC

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
200MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
133MHz
Embedded Interface Type
I2C, MII, SPI, TDM, UTOPIA
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XPC8260CZUIFBC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
Electrical and Thermal Characteristics
2.4
The following sections include illustrations and tables of clock diagrams, signals, and CPM outputs and
inputs for the 66 MHz MPC8260 device. Note that AC timings are based on a 50-pf load. Typical output
buffer impedances are shown in
Table 7
Table 8
12
Note:
sp36a
sp36b
sp38a
sp38b
Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings are
measured at the pin.
sp40
sp42
Max
Spec Number
lists CPM output characteristics.
lists CPM input characteristics.
MPC8260 PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2
AC Electrical Characteristics
sp37a
sp37b
sp39a
sp39b
sp41
sp43
Min
It is recommended that the rise/fall time on CPM input pins should not
exceed 5 ns. This should be enforced especially on clock signals. Rise time
refers to signal transitions from 10% to 90% of VCC; fall time refers to
transitions from 90% to 10% of VCC.
FCC outputs—internal clock (NMSI)
FCC outputs—external clock (NMSI)
TDM outputs/SI
SCC/SMC/SPI/I2C outputs—internal clock (NMSI)
Ex_SCC/SMC/SPI/I2C outputs—external clock (NMSI)
PIO/TIMER/IDMA outputs
Table 7. AC Characteristics for CPM Outputs
1
60x bus
Local bus
Memory controller
Parallel I/O
Note:
Table
NOTE: Rise/Fall Time on CPM Input Pins
These are typical values at 65° C. The impedance
may vary by ±25% with process and temperature.
Table 6. Output Buffer Impedances
Output Buffers
6.
Characteristic
Typical Impedance (Ω)
40
40
40
46
1
1
Max Delay (ns)
66 MHz
14
25
19
19
14
6
Freescale Semiconductor
Min Delay (ns)
66 MHz
1
2
5
1
2
1

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