MC68EC040RC20A Freescale Semiconductor, MC68EC040RC20A Datasheet - Page 243

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MC68EC040RC20A

Manufacturer Part Number
MC68EC040RC20A
Description
IC MPU 32BIT 20MHZ 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC20A

Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS Compliant
Features
-
Freescale Semiconductor, Inc.
Table 8-6 lists the possible combinations of write-backs and the proper way to handle
them. The SSW_RW column indicates a read or write cycle; the SSW_PUSH column
indicates whether the fault is for a push (TT = 00 and TM = 000). The WB1S, WB2S, and
WB3S columns list the respective field’s V-bit and indicate a MOVE16 transfer type (TT =
01). The easy cleanup data written column lists the stack’s field to be written out to
memory if the user is not concerned with retouching peripherals. The hard cleanup action
column lists the action to be taken if the peripherals cannot be retouched by MOVE16 (if
different from easy cleanup). Note that if a push access error is reported and the size is
long word, all four long words, PD0–PD3, are still valid for the line. The exception handler
can either write PD0–PD3 using the fault address with bits 3–0 cleared or write the PD
corresponding to bits 3–2 of the address (e.g., address $0000000C corresponds to PD3).
Note that a MOVE16 is never reported in the WB3S. The SIZE field of WB3S is never a
line.
After the bus error exception handler completes all pending operations and executes an
RTE to return, the RTE reads only the stack information from offset $0–$D in the access
error stack frame. For a pending trace exception, unimplemented floating-point instruction
exception, or floating-point post-instruction exception, the RTE adjusts the stack to match
the pending exception and immediately begins exception processing, without requiring the
exception to reoccur.
8-30
M68040 USER’S MANUAL
MOTOROLA
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