MC68HC000RC12 Freescale Semiconductor, MC68HC000RC12 Datasheet - Page 140

• Manufacturer Part Number: MC68HC000RC12
• Description: IC MPU 32BIT 12MHZ 68-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC000RC12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 16/32Bit
• Frequency (max): 12MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 68
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

9.12 EXCEPTION PROCESSING EXECUTION TIMES
Table 9-19 lists the timing data for exception processing. The numbers of clock periods
include the times for all stacking, the vector fetch, and the fetch of the first instruction of
the handler routine. The total number of clock periods, the number of read cycles, and the
number of write cycles are shown in the previously described format. The number of clock
periods, the number of read cycles, and the number of write cycles, respectively, must be
added to those of the effective address calculation where indicated by a plus sign (+).
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL
Freescale Semiconductor, Inc.
*** Indicates the time from when RESET and HALT
** Indicates maximum value.
+ Add effective address calculation time.
* The interrupt acknowledge and breakpoint cycles
Address Error
Breakpoint Instruction*
Bus Error
CHK Instruction**
Divide By Zero
Illegal Instruction
Interrupt*
MOVEC, Illegal Control Register**
Privilege Violation
Reset***
RTE, Illegal Format
RTE, Illegal Revision
Trace
TRAP Instruction
TRAPV Instruction
For More Information On This Product,
Table 9-19. Exception Processing
are assumed to take four clock periods.
are first sampled as negated to when instruction
execution starts.
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Exception
Execution Times
126(4/26)
126(4/26)
44(5/4)+
42(5/4)+
70(12/4)
45(5/4)
38(5/4)
46(5/4)
46(5/4)
38(5/4)
40(6/0)
50(7/4)
38(4/4)
38(4/4)
38(5/4)
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