MC68020EH16E Freescale Semiconductor, MC68020EH16E Datasheet - Page 215

IC MPU 32BIT 33MHZ 132-PQFP

MC68020EH16E

Manufacturer Part Number
MC68020EH16E
Description
IC MPU 32BIT 33MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68020EH16E

Processor Type
M680x0 32-Bit
Speed
166MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16.67MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68020EH16E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
SECTION 8
INSTRUCTION EXECUTION TIMING
This section describes the instruction execution and operations (table searches, etc.) of
the MC68020/EC020 in terms of external clock cycles. It provides accurate execution and
operation timing guidelines but not exact timings for every possible circumstance. This
approach is used since exact execution time for an instruction or operation is highly
dependent on memory speeds and other variables. The timing numbers presented in this
section allow the assembly language programmer or compiler writer to predict timings
needed to evaluate the performance of the MC68020/EC020.
In this section, instruction and operation times are shown in clock cycles, which eliminates
clock frequency dependencies.
8.1 TIMING ESTIMATION FACTORS
The advanced architecture of the MC68020/EC020 makes exact instruction timing
calculations difficult due to the effects of:
These factors make MC68020/EC020 instruction set timing difficult to calculate on a single
instruction basis since instructions vary in execution time from one context to another. A
detailed explanation of each of these factors follows.
8.1.1 Instruction Cache and Prefetch
The on-chip cache of the MC68020/EC020 is an instruction-only cache. Its purpose is to
increase execution efficiency by providing a quick store for instructions.
Instruction prefetches that hit in the cache will occur with no delay in instruction execution.
Instruction prefetches that miss in the cache will cause an external memory cycle to be
performed, which may overlap with internal instruction execution. Thus, while the
execution unit of the microprocessor is busy, the bus controller prefetches the next
instruction from external memory. Both cases are illustrated in later examples.
MOTOROLA
1. An On-Chip Instruction Cache and Instruction Prefetch
2. Operand Misalignment
3. Bus Controller/Sequence Concurrency
4. Instruction Execution Overlap
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68020 USER’S MANUAL
8- 1

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