MPC850DECZQ66BU Freescale Semiconductor, MPC850DECZQ66BU Datasheet - Page 32

• Manufacturer Part Number: MPC850DECZQ66BU
• Description: IC MPU PWRQUICC 66MHZ 256-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC850DECZQ66BU

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 66MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Bus Signal Timing
Table 8
32
1
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
Num
PSHT = 0. Otherwise add PSHT times cycle time.
These synchronous timings define when the WAIT_B signal is detected in order to freeze (or relieve) the PCMCIA
current cycle. The WAIT_B assertion will be effective only if it is detected 2 cycles before the PSL timer expiration.
See PCMCIA Interface in the MPC850 PowerQUICC User’s Manual.
PSST = 1. Otherwise add PSST times cycle time.
shows the PCMCIA timing for the MPC850.
MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2
A[6–31], REG valid to PCMCIA strobe
asserted.
A[6–31], REG valid to ALE negation.
CLKOUT to REG valid
CLKOUT to REG Invalid.
CLKOUT to CE1, CE2 asserted.
CLKOUT to CE1, CE2 negated.
CLKOUT to PCOE, IORD, PCWE,
IOWR assert time.
CLKOUT to PCOE, IORD, PCWE,
IOWR negate time.
CLKOUT to ALE assert time
CLKOUT to ALE negate time
PCWE, IOWR negated to D[0–31]
invalid.
WAIT_B valid to CLKOUT rising edge.
CLKOUT rising edge to WAIT_B
invalid.
1
1
1
Characteristic
Table 8. PCMCIA Timing
1
1
13.00
18.00
5.00
6.00
5.00
5.00
2.00
5.00
3.00
8.00
2.00
Min
—
—
50MHz
13.00
13.00
13.00
13.00
13.00
11.00
11.00
Max
—
—
—
—
—
—
21.00
28.00
9.00
8.00
8.00
8.00
2.00
8.00
6.00
8.00
2.00
Min
—
—
66MHz
16.00
16.00
16.00
11.00
11.00
16.00
16.00
Max
—
—
—
—
—
—
17.00
23.00
6.00
7.00
6.00
6.00
2.00
4.00
8.00
2.00
6.00
Min
—
—
80 MHz
14.00
14.00
14.00
11.00
11.00
14.00
14.00
Max
—
—
—
—
—
—
Freescale Semiconductor
FFACTOR Unit
0.750
1.000
0.250
0.250
0.250
0.250
0.250
0.250
0.250
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns