CP80C86-2Z Intersil, CP80C86-2Z Datasheet - Page 33

• Manufacturer Part Number: CP80C86-2Z
• Description: IC CPU 16BIT 5V 8MHZ 40-PDIP
• Manufacturer: Intersil

Specifications of CP80C86-2Z

• Processor Type: 80C86 16-Bit
• Speed: 8MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Instruction Set Summary
SAR = Shift Arithmetic Right
ROL = Rotate Left
ROR = Rotate Right
RCL = Rotate Through Carry Flag Left
RCR = Rotate Through Carry Right
AND = And:
Reg./Memory and Register to Either
Immediate to Register/Memory
Immediate to Accumulator
TEST = And Function to Flags, No Result:
Register/Memory and Register
Immediate Data and Register/Memory
Immediate Data and Accumulator
OR = Or:
Register/Memory and Register to Either
Immediate to Register/Memory
Immediate to Accumulator
XOR = Exclusive Or:
Register/Memory and Register to Either
Immediate to Register/Memory
Immediate to Accumulator
STRING MANIPULATION
REP = Repeat
MOVS = Move Byte/Word
CMPS = Compare Byte/Word
SCAS = Scan Byte/Word
LODS = Load Byte/Word to AL/AX
STOS = Stor Byte/Word from AL/A
CONTROL TRANSFER
CALL = Call:
Direct Within Segment
Indirect Within Segment
Direct Intersegment
Indirect Intersegment
JMP = Unconditional Jump:
Direct Within Segment
Direct Within Segment-Short
Indirect Within Segment
MNEMONIC AND DESCRIPTION
33
(Continued)
0 0 1 0 0 0 0 d w
1 0 0 0 0 0 0 w
0 0 1 0 0 1 0 w
1 0 0 0 0 1 0 w
1 1 1 1 0 1 1 w
1 0 1 0 1 0 0 w
0 0 0 0 1 0 d w
1 0 0 0 0 0 0 w
0 0 0 0 1 1 0 w
0 0 1 1 0 0 d w
1 0 0 0 0 0 0 w
0 0 1 1 0 1 0 w
1 0 1 0 0 1 0 w
1 0 1 0 0 1 1 w
1 0 1 0 1 1 1 w
1 0 1 0 1 1 0 w
1 0 1 0 1 0 1 w
7 6 5 4 3 2 1 0
1 1 0 1 0 0 v w
1 1 0 1 0 0 v w
1 1 0 1 0 0 v w
1 1 0 1 0 0 v w
1 1 0 1 0 0 v w
1 1 1 0 1 0 0 0
1 1 1 1 1 1 1 1
1 0 0 1 1 0 1 0
1 1 1 1 1 1 1 1
1 1 1 0 1 0 0 1
1 1 1 0 1 0 1 1
1 1 1 1 1 1 1 1
1 1 1 1 0 0 1 z
80C86
7 6 5 4 3 2 1 0
mod 1 1 1 r/m
mod 0 0 0 r/m
mod 0 0 1 r/m
mod 0 1 0 r/m
mod 0 1 1 r/m
mod 1 0 0 r/m
mod 0 0 0 r/m
mod 1 0 1 r/m
mod 1 1 0 r/m
mod 0 1 0 r/m
mod 0 1 1 r/m
mod 1 0 0 r/m
mod reg r/m
mod reg r/m
mod reg r/m
mod reg r/m
offset-low
disp-low
disp-low
seg-low
data
data
data
data
disp
INSTRUCTION CODE
7 6 5 4 3 2 1 0
data if w = 1
data if w = 1
data if w = 1
data if w = 1
offset-high
disp-high
disp-high
seg-high
data
data
data
data
data if w = 1
data if w = 1
data if w = 1
7 6 5 4 3 2 1 0
data if w = 1
January 9, 2009
FN2957.3