MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 398
MC68EC000EI8
Manufacturer Part Number
MC68EC000EI8
Description
IC MPU 32BIT 85MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
M68000r
Specifications of MC68EC000EI8
Processor Type
M680x0 32-Bit
Speed
8MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Core Size
32 Bit
Cpu Speed
8MHz
Digital Ic Case Style
PLCC
No. Of Pins
68
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
0°C To +70°C
Filter Terminals
SMD
Rohs Compliant
Yes
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Floating Point Instructions
FMUL
Instruction Fields:
5-96
Effective Address field—Determines the addressing mode for external operands.
R/M field—Specifies the source operand address mode.
Source Specifier field—Specifies the source register or data format.
If R/M = 0, this field is unused and should be all zeros.
If R/M = 1, specifies the location of the source operand location. Only data
0 — The operation is register to register.
1 — The operation is < ea > to register.
If R/M = 0, specifies the source floating-point data register.
If R/M = 1, specifies the source data format:
addressing modes can be used as listed in the following table:
*This encoding will cause an unimplemented data type exception in the
000 — Long-Word Integer (L)
001 — Single-Precision Real (S)
010 — Extended-Precision Real (X)
011 — Packed-Decimal Real (P)*
100 — Word Integer (W)
101 — Double-Precision Real (D)
110 — Byte Integer (B)
MC68040 to allow emulation in software.
*Only if < fmt > is byte, word, long, or single.
Addressing Mode
([bd,An,Xn],od)
([bd,An],Xn,od)
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
(bd,An,Xn)
(d
(d
8
(An) +
– (An)
,An,Xn)
(An)
16
Dn*
An
,An)
Floating-Point Multiply
(MC6888X, MC68040)
Mode
000
010
011
100
101
110
110
110
110
—
reg. number:Dn
reg. number:An
reg. number:An
reg. number:An
reg. number:An
reg. number:An
reg. number:An
reg. number:An
reg. number:An
Register
—
Addressing Mode
([bd,PC,Xn],od)
([bd,PC],Xn,od)
(bd,PC,Xn)
(d
# < data >
(d
(xxx).W
(xxx).L
8
,PC,Xn)
16
,PC)
Mode
111
111
111
111
111
111
111
111
FMUL
MOTOROLA
Register
000
001
100
010
011
011
011
011
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