Z16C0210PEC Zilog, Z16C0210PEC Datasheet - Page 4

• Manufacturer Part Number: Z16C0210PEC
• Description: IC 10MHZ Z16C00 CMOS 40-DIP
• Manufacturer: Zilog

Specifications of Z16C0210PEC

• Processor Type: Z16C01/C02
• Features: Low Power CMOS
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The DC characteristics below apply for the following test
conditions, unless otherwise noted. All voltages are refer-
enced to GND (OV). Positive current flows into the refer-
Available operating temperature ranges are:
DC CHARACTERISTICS
4
ABSOLUTE MAXIMUM RATINGS
Voltages on V,, with respect to V,, . . . . . . . . . . . . . . -0.3V to +7.OV
Voltages on all inputs with respect to
V ss........““.............................................
Storage Temperature.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65”C to + 150%
STANDARD TEST CONDITIONS
enced pin.
VI,
V,, RESET
Vi,
V
SYm
V
V
V,, NMI
V
I
I\ SEGT
I
ICC
OL
CH
CL
OH
OL
s = 0°C to +7O”C, + 4.5v s V,,I + 5.5v
(Z16COi,Zl6CO2)
E = -4OOC to +lOO”C, + 4.5V IV&
(Z16CO1, Zi 6CO2)
V,, Power Supply Current
Parameter
Clock input High Voltage
Clock input Low Voltage
Input High Voltage
Input High Voltage on /RESET Pin
Input High Voltage on NMI Pin
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Leakage
Input Leakage on /SEGT Pin
Output Leakage
-0.3V to V,,+O.3V
+ 5.5V
v&I.4
MIN
-100
-0.3
-0.3
2.0
2.4
2.4
2.4
v,$o.3
v,,to.3
v,,to.3
v,,tD.3
MAX
0.45
L-10
*lo
100
0.8
0.4
35
The Ordering Information section lists package tempera-
ture ranges and product numbers.
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operating of the device at
any condition above these indicated in the operational
sectionsof these specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
All AC parameters assume a total load capacitance
(including parasitic capacitances) or 100 pf max, except
for parameter 6 (50 pf max). Timing reference between two
output signals assume a load difference of 50 pf max.
Units
rnA
I”J\
f#I
p4
v
v
v
v
v
V
V
Condition
b:4;‘ :$
0.4V < VIN < t2.4V
Driven by External Clock Generator
Driven by External Clock Generator
I,,=-250uA
10MHz
+2.4V
cPs95scc0103
Z16COlKO2 +