EZ80L92AZ050SC00TR Zilog, EZ80L92AZ050SC00TR Datasheet - Page 19

• Manufacturer Part Number: EZ80L92AZ050SC00TR
• Description: IC EZ80 MPU 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ050SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: EZ80L92AZ050SC00T

Table 1. 100-Pin LQFP Pin Identification of eZ80L92 MCU (Continued)
PS013014-0107
Pin No
63
64
65
66
67
68
69
TCK
TRIGOUT
TDI
TDO
PD0
PD1
Symbol
V
TxD0
IR_TXD
RxD0
IR_RXD
DD
Function
JTAG Test
Clock
JTAG Test
Trigger Output
JTAG Test
Data In
JTAG Test
Data Out
Power Supply
GPIO Port D
UART
Transmit Data
IrDA Transmit
Data
GPIO Port D
Receive Data
IrDA Receive
Data
Signal Direction
Input
Output
Bidirectional
Output
Bidirectional
Output
Output
Bidirectional
Input
Input
JTAG and ZDI clock input.
Active High trigger event indicator.
JTAG data input pin. Functions as
ZDI data I/O pin when JTAG is disabled.
JTAG data output pin.
Power Supply.
This pin can be used for GPIO. It can be
individually programmed as input or
output and can also be used individually
as an interrupt input. Each Port D pin,
when programmed as output, can be
selected to be an open-drain or open-
source output. Port D is multiplexed with
one UART.
This pin is used by the UART to transmit
asynchronous serial data. This signal is
multiplexed with PD0.
This pin is used by the IrDA encoder/
decoder to transmit serial data. This signal
is multiplexed with PD0.
This pin can be used for GPIO. It can be
individually programmed as input or
output and can also be used individually
as an interrupt input. Each Port D pin,
when programmed as output, can be
selected to be an open-drain or open-
source output. Port D is multiplexed with
one UART.
This pin is used by the UART to receive
asynchronous serial data. This signal is
multiplexed with PD1.
This pin is used by the IrDA encoder/
decoder to receive serial data. This signal
is multiplexed with PD1.
Description
Product Specification
Architectural Overview
13