EZ80L92AZ020SC00TR Zilog, EZ80L92AZ020SC00TR Datasheet - Page 73
EZ80L92AZ020SC00TR
Manufacturer Part Number
EZ80L92AZ020SC00TR
Description
IC EZ80 MPU 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ020SC00TR
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
20MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
EZ80L92AZ020SC00T
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PS013014-0107
Chip Select Registers
System Clock
ADDR[23:0]
DATA[7:0]
or IORQ
DTACK
MREQ
Switching Between Bus Modes
Each time the bus mode controller must switch from one bus mode to another, there is a
one-cycle eZ80 system clock delay. An extra clock cycle is not required for repeated
accesses in any of the bus modes; nor is it required when the eZ80L92 switches to eZ80
Bus Mode. The extra clock cycles are not shown in the timing examples. Due to the asyn-
chronous nature of these bus protocols, the extra delay does not impact peripheral commu-
nication.
Chip Select x Lower Bound Registers
For Memory Chip Selects, the Chip Select x Lower Bound register (see
the lower bound of the address range for which the corresponding Memory Chip Select (if
CSx
R/W
DS
AS
Figure 16. Motorola Bus Mode Write Timing Example
S0
S1
S2
S3
S4
S5
S6
Chip Selects and Wait States
Product Specification
S7
Table
eZ80L92 MCU
22) defines
67
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