668-0003-C Rabbit Semiconductor, 668-0003-C Datasheet - Page 218

• Manufacturer Part Number: 668-0003-C
• Description: IC CPU RABBIT2000 30MHZ 100PQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 668-0003-C

• Rohs Status: RoHS non-compliant
• Processor Type: Rabbit 2000 8-Bit
• Speed: 30MHz
• Voltage: 2.7V, 3V, 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Features: -
• Other names: 316-1004; 668-0003

The MMIDR register shown in Table B-9 is used to enable and configure separate I & D
space support in addition to the /CS1 enable option used to improve the access time of
battery-backable SRAM.
212
Bit(s)
7:6
5
4
3
2
1
0
NOTE: Bits [7:5] and [3:0] were always written with zero in the original Rabbit 2000 chip.
MMU Instruction/Data Register
Table B-9. MMU Instruction/Data Register (MMIDR = 0x010)
Value
00
0
1
0
1
0
1
0
1
0
1
0
1
These bits are ignored and always return zeros when read.
Enable A16 and A19 inversion independent of instruction/data.
Enable A16 and A19 inversion (controlled by bits 0-3) for data accesses only.
This enables the instruction/data split. This is separate I and D space.
Normal /CS1 operation.
Force /CS1 always active. This will not cause any conflicts as long as the
memory using /CS1 does not also share an Output Enable or Write Enable with
another memory.
Normal operation.
For a DATASEG access, invert A19 before MBxCR (bank select) decision.
Normal operation.
For a DATASEG access: invert A16
Normal operation.
For root access, invert A19 before MBxCR (bank select) decision.
Normal operation.
For root access, invert A16
(MMIDR)
Description
Rabbit 2000 Microprocessor User’s Manual
(Address = 0x10)