MPC860SRCZQ50D4 Freescale Semiconductor, MPC860SRCZQ50D4 Datasheet - Page 15
![IC MPU POWERQUICC 50MHZ 357PBGA](/photos/6/76/67680/mfg_mpc860_series_sml.jpg)
MPC860SRCZQ50D4
Manufacturer Part Number
MPC860SRCZQ50D4
Description
IC MPU POWERQUICC 50MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICCr
Datasheet
1.MC860DECVR50D4R2.pdf
(80 pages)
Specifications of MPC860SRCZQ50D4
Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Core Size
32 Bit
Program Memory Size
8KB
Cpu Speed
50MHz
Digital Ic Case Style
BGA
No. Of Pins
357
Supply Voltage Range
2V To 3.6V
Operating Temperature Range
-40°C To +95°C
Rohs Compliant
No
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC860SRCZQ50D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
9
Table 7
The maximum bus speed supported by the MPC860 is 66 MHz. Higher-speed parts must be operated in
half-speed bus mode (for example, an MPC860 used at 80 MHz must be configured for a 40-MHz bus).
The timing for the MPC860 bus shown assumes a 50-pF load for maximum delays and a 0-pF load for
minimum delays.
Freescale Semiconductor
Num
B5
B1a
B1b
B1c
B1d
B1e
B1g
B1h
B7a
B7b
B8a
B8b
B1f
B1
B2
B3
B4
B7
B8
33
Bus Signal Timing
provides the bus operation timing for the MPC860 at 33, 40, 50, and 66 MHz.
CLKOUT period
EXTCLK to CLKOUT phase skew
(EXTCLK > 15 MHz and MF <= 2)
EXTCLK to CLKOUT phase skew
(EXTCLK > 10 MHz and MF < 10)
CLKOUT phase jitter (EXTCLK > 15 MHz
and MF <= 2)
CLKOUT phase jitter
CLKOUT frequency jitter (MF < 10)
CLKOUT frequency jitter (10 < MF < 500)
CLKOUT frequency jitter (MF > 500)
Frequency jitter on EXTCLK
CLKOUT pulse width low
CLKOUT width high
CLKOUT rise time
CLKOUT fall time
CLKOUT to A(0:31), BADDR(28:30),
RD/WR, BURST, D(0:31), DP(0:3) invalid
CLKOUT to TSIZ(0:1), REG, RSV, AT(0:3),
BDIP, PTR invalid
CLKOUT to BR, BG, FRZ, VFLS(0:1),
VF(0:2) IWP(0:2), LWP(0:1), STS invalid
CLKOUT to A(0:31), BADDR(28:30)
RD/WR, BURST, D(0:31), DP(0:3) valid
CLKOUT to TSIZ(0:1), REG, RSV, AT(0:3)
BDIP, PTR valid
CLKOUT to BR, BG, VFLS(0:1), VF(0:2),
IWP(0:2), FRZ, LWP(0:1), STS valid
1
Characteristic
3
3
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
1
2
Table 7. Bus Operation Timings
1
1
4
4
1
30.30
–0.90
–2.30
–0.60
–2.00
12.12
12.12
7.58
7.58
7.58
7.58
7.58
7.58
Min
—
—
—
—
—
—
33 MHz
30.30
14.33
14.33
14.33
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
—
—
—
—
—
25.00
–0.90
–2.30
–0.60
–2.00
10.00
10.00
6.25
6.25
6.25
6.25
6.25
6.25
Min
—
—
—
—
—
—
40 MHz
30.30
13.00
13.00
13.00
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
—
—
—
—
—
20.00
–0.90
–2.30
–0.60
–2.00
8.00
8.00
5.00
5.00
5.00
5.00
5.00
5.00
Min
—
—
—
—
—
—
50 MHz
30.30
11.75
11.75
11.75
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
—
—
—
—
—
15.15
–0.90
–2.30
–0.60
–2.00
6.06
6.06
3.80
3.80
3.80
3.80
3.80
3.80
Min
—
—
—
—
—
—
66 MHz
Bus Signal Timing
30.30
10.04
10.04
10.04
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
%
15