MPC8241LVR266D Freescale Semiconductor, MPC8241LVR266D Datasheet - Page 4

IC MPU 32BIT 266MHZ PPC 357-PBGA

MPC8241LVR266D

Manufacturer Part Number
MPC8241LVR266D
Description
IC MPU 32BIT 266MHZ PPC 357-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerPCr
Datasheet

Specifications of MPC8241LVR266D

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
266MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xxx
Core
603e
Maximum Clock Frequency
266 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
266MHz
Digital Ic Case Style
BGA
No. Of Pins
357
Supply Voltage Range
1.14V To 1.26V
Operating Temperature Range
0°C To +105°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Features
4
— 32-bit PCI interface
— Two-channel integrated DMA controller (writes to ROM/PortX not supported)
— Message unit
– Write buffering for PCI and processor accesses
– Normal parity, read-modify-write (RMW), or ECC
– Data-path buffering between memory interface and processor
– Low-voltage TTL logic (LVTTL) interfaces
– 272 Mbytes of base and extended ROM/Flash/PortX space
– Base ROM space for 8-bit data path or same size as the SDRAM data path (32- or 64-bit)
– Extended ROM space for 8-, 16-, 32-bit gathering data path, 32- or 64-bit (wide) data path
– PortX: 8-, 16-, 32-, or 64-bit general-purpose I/O port using ROM controller interface with
– Operates up to 66 MHz
– PCI 2.2-compatible
– PCI 5.0-V tolerance
– Dual address cycle (DAC) for 64-bit PCI addressing (master only)
– PCI locked accesses to memory
– Accesses to PCI memory, I/O, and configuration spaces
– Selectable big- or little endian operation
– Store gathering of processor-to-PCI write and PCI-to-memory write accesses
– Memory prefetching of PCI read accesses
– Selectable hardware-enforced coherency
– PCI bus arbitration unit (five request/grant pairs)
– PCI agent mode capability
– Address translation with two inbound and outbound units (ATU)
– Internal configuration registers accessible from PCI
– Direct mode or chaining mode (automatic linking of DMA transfers)
– Scatter gathering—read or write discontinuous memory
– 64-byte transfer queue per channel
– Interrupt on completed segment, chain, and error
– Local-to-local memory
– PCI-to-PCI memory
– Local-to-PCI memory
– PCI memory-to-local memory
– Two doorbell registers
– Two inbound and two outbound messaging registers
– I
programmable address strobe timing, data ready input signal (DRDY), and 4 chip selects
2
O message interface
MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Freescale Semiconductor

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