MPC862PZQ100B Freescale Semiconductor, MPC862PZQ100B Datasheet - Page 70

• Manufacturer Part Number: MPC862PZQ100B
• Description: IC MPU POWERQUICC 100MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC862PZQ100B

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 100MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 100MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465/3.6V
• Operating Supply Voltage (min): 2/3.135V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

FEC Electrical Characteristics
13.1
The receiver functions correctly up to a MII_RX_CLK maximum frequency of 25MHz +1%. There is no
minimum frequency requirement. In addition, the processor clock frequency must exceed the
MII_RX_CLK frequency - 1%.
Table 29
Figure 73
13.2
The transmitter functions correctly up to a MII_TX_CLK maximum frequency of 25 MHz +1%. There is
no minimum frequency requirement. In addition, the processor clock frequency must exceed the
MII_TX_CLK frequency - 1%.
Table 30
70
Num
Num
M1
M2
M3
M4
M5
M6
provides information on the MII receive signal timing.
provides information on the MII transmit signal timing.
MII Receive Signal Timing (MII_RXD[3:0], MII_RX_DV, MII_RX_ER,
MII_RX_CLK)
MII_RXD[3:0] (inputs)
MII_RX_DV
MII_RX_ER
MII Transmit Signal Timing (MII_TXD[3:0], MII_TX_EN,
MII_TX_ER, MII_TX_CLK)
MII_RX_CLK (input)
shows MII receive signal timing.
MII_RXD[3:0], MII_RX_DV, MII_RX_ER to MII_RX_CLK setup
MII_RX_CLK to MII_RXD[3:0], MII_RX_DV, MII_RX_ER hold
MII_RX_CLK pulse width high
MII_RX_CLK pulse width low
MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER invalid
MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER valid
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Figure 73. MII Receive Signal Timing Diagram
Characteristic
Characteristic
Table 30. MII Transmit Signal Timing
Table 29. MII Receive Signal Timing
M1
M2
M3
35%
35%
Min
M4
Min
5
5
—
5
65%
65%
Max
Max
—
—
25
—
MII_RX_CLK period
MII_RX_CLK period
Freescale Semiconductor
Unit
Unit
ns
ns
ns