Z8S18010FSG Zilog, Z8S18010FSG Datasheet - Page 60
Z8S18010FSG
Manufacturer Part Number
Z8S18010FSG
Description
IC 10MHZ STATIC Z180 80-QFP
Manufacturer
Zilog
Datasheet
1.Z8S18010PSG.pdf
(71 pages)
Specifications of Z8S18010FSG
Processor Type
Z180
Features
Enhanced Z180
Speed
10MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
80-BQFP
Processor Series
Z8S180X
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 3.3 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8S18000ZEM
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4296
Z8S18010FSG
Z8S18010FSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8S18010FSG
Manufacturer:
Zilog
Quantity:
426
For burst memory to/from memory transfers, the DMAC
takes control of the bus continuously until the DMA transfer
Table 16 indicates all DMA transfer mode combinations of
fers are not implemented, 12 combinations are available.
nel 0 is configured for memory to/from memory transfers
there is no Request Handshake signal to control the transfer
timing. Instead, two automatic transfer timing modes are se-
lectable: burst (
,
* Includes memory mapped I/O.
,
, and
. Because I/O to/from I/O trans-
) and cycle steal (
When chan-
).
completes (as indicated by the byte count register = ). In
cycle steal mode, the CPU is provided a cycle for each DMA
byte transfer cycle until the transfer is completed.
For channel 0 DMA with I/O source or destination, the se-
lected Request signal times the transfer ignoring
is cleared to
0
during
.
ZiLOG
.