CY8CTMG200-16LGXIT Cypress Semiconductor Corp, CY8CTMG200-16LGXIT Datasheet - Page 91
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CY8CTMG200-16LGXIT
Manufacturer Part Number
CY8CTMG200-16LGXIT
Description
IC MCU 32K FLASH 16-COL
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTMG200-16LGXIT
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
13
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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The programmable timer is a 6-bit down counter with a ter-
minal count output. This timer has one data register associ-
ated with it. The timer is started when the TrueTouch block is
enabled. The enable signal is double synchronized to the
timer’s clock domain. When started, the timer always starts
counting down from the value loaded into its data registers
(CS_TIMER). This timer only has a one shot mode, in which
the timer completes one full count cycle and stops. Disabling
and reenabling the TrueTouch block restarts the timer.
Figure 11-14. RLO Timer Block Diagram
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Relaxation
Oscillator
TrueTouch
Clock
COUNT_EN=0
No
RLO_TIMER_IRQ
RLO_TIMER_TC
Mode=01 or 10
Inter-
rupt
Mode=00
Yes
MUXBUS
No
TIMER
Yes
CMP0
CMP1
Programmable
Reset
ILO
Rising
Edge?
‘0’
Mode=11 Mode=01
Enabled
No
Register
DATA[5:0]
Block
Timer
No
Yes
?
INSEL[2:0]
Enable
Block
d?
0
1
2
3
4
5
6
7
No
Yes
Falling
Edge?
COUNT_EN=0
PF_DONE=0
COUNT_EN=1
INV
Mode=00 or 11
Yes
Mode=10
No
Figure 11-13. TrueTouch Counter Block Diagram
COUNT_EN=0
PF_DONE=1
Yes
Edge?
Rising
Terminal
Count
IRQ
IMO
(Control Logic)
COUNT_EN
PF DONE
IMO/4
IMO/8
IMO/2
CLK/RLO
IMO
CLKSEL[1:0]
COH
COL
CLK
IMO
0
1
2
3
Low Byte Counter
CSCLK
CSCLK
I N
Up Counter
RLO
8-Bit
The timer’s clock is either the 32 kHz clock (RLO) or the
TrueTouch count clock, depending upon the value of the
PXD_EN bit in the CS_CR2 register. See the
ister on page 93
11.1.3.1
When started, the timer loads the value contained in its data
register and counts down to its terminal count of zero. The
timer outputs an active high terminal count pulse for one
clock cycle when it reaches the terminal count. The low time
of the terminal count pulse is equal to the loaded decimal
count value multiplied by the clock period. (TC
VALUE
output is the pulse width of the terminal count plus one clock
period (TC
gram in
BLOCK_EN
BLOCK_EN
BLOCK_EN
BLOCK_EN
CO
IOW or
COLR
Edge Detect
COHR
IOW or
IOW or
IOW or
PXD_EN
0
1
COL
decimal
Figure 11-19 on page
R
S
R
S
R
S
R
S
RLO
period
6-Bit Counter
CHAIN
* CLK
Operation
RLOCLOCK
COHS
COLS
= TC
INS
PPS
for details.
0
1
period
CO
pw
COUNT_EN
PPM
COLM
COHM
INM
+ CLK
). The period of the terminal count
High Byte Counter
RLO_TIMER_TC
RLO_TIMER_IRQ
98.
period
CS_INT
COHR
COLR
Up Counter
). Refer to the timing dia-
IN
CSOUT[1:0]
8-Bit
CO
0
1
2
3
TrueTouch Module
CS_CR2 Reg-
CS_INT
pw
COH
To Pin
= COUNT
[+] Feedback
91
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