CY7C64613-128NC Cypress Semiconductor Corp, CY7C64613-128NC Datasheet - Page 13

• Manufacturer Part Number: CY7C64613-128NC
• Description: IC MCU USB EZ FX 8K RAM 128BQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX™r

Specifications of CY7C64613-128NC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C646xx
• Ram Size: 8K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 40
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1310

3.2
Document #: 38-08005 Rev. **
Port A
128
19
20
34
25
26
27
28
29
CY7C646xx Pin Descriptions
80
19
12
13
14
15
11
6
7
52
12
10
6
7
XIN
XOUT
CLKOUT
PA0 or
T0OUT
PA1 or
T1OUT
PA2 or
OE# or
PA3 or
CS#
PA4 or
FWR# or
RDY4 or
SLWR
Name
Output
Type
Input
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
O/Z
(continued)
24 MHz
Default
(PA0)
(PA1)
(PA2)
(PA3)
(PA4)
N/A
N/A
I
I
I
I
I
Crystal Input. Connect this signal to a 12-MHz series-resonant,
fundamental mode crystal and 22–33 pF capacitor to GND. Also
connect a 1-M resistor between XIN and XOUT.
Crystal Output. Connect this signal to a 12-MHz series-resonant,
fundamental mode crystal and 22–33 pF capacitor to GND. Also
connect a 1-M resistor between XIN and XOUT.
24- or 48-MHz clock, phase locked to the 12-MHz input clock. Out-
put frequency is set by an external EEPROM bit (Config0.2). If no
EEPROM is connected to the I
sistors are present), the 8051 defaults to 24-MHz operation. The
8051 may three-state this output by setting CPUCS.1=1. The CLK-
OUT pin may be inverted by setting the boot EEPROM bit
CONFIG0.1=1.
Multiplexed pin whose function is selected by two bits:
PORTACFG.0 and IFCONFIG.3.
PA0 is a bidirectional IO port pin.
T0OUT is an active-HIGH signal from 8051 Timer-counter0. T0OUT
outputs a high level for one CLKOUT clock cycle when Timer0 over-
flows. If Timer0 is operated in mode 3 (two separate timer/counters),
T0OUT is active when the low byte timer/counter overflows.
Multiplexed pin whose function is selected by two bits:
PORTACFG.1 and IFCONFIG.3.
PA1 is a bidirectional IO port pin.
T1OUT is an active-HIGH signal from 8051 Timer-counter1. T1OUT
outputs a high level for one CLKOUT clock cycle when Timer1 over-
flows. If Timer1 is operated in mode 3 (two separate timer/counters),
T1OUT is active when the low byte timer/counter overflows.
Multiplexed pin whose function is selected by two bits:
PORTACFG.2 and IFCONFIG.3.
PA2 is a bidirectional IO port pin.
OE# is an active-LOW output enable for external memory. If the OE#
pin is used, it should be externally pulled up to V
the write strobe is inactive (high) at power-on.
Multiplexed pin whose function is selected by the PORTACFG.3 bit.
PA3 is a bidirectional I/O port pin.
CS# is an active-LOW chip select for external memory. If the CS#
pin is used, it should be externally pulled up to V
the write strobe is inactive (HIGH) at power-on.
Multiplexed pin whose function is selected by the following bits:
PORTACFG.4, PORTACF2.4, and IFCONFIG[1..0].
PA4 is a bidirectional I/O port pin.
FWR# is the write strobe output for an external FIFO connected to
the data bus D[7..0]. If the FWR# pin is used, it should be externally
pulled up to V
on.
RDY4 is a GPIF input signal.
SLWR is the write strobe input for the slave FIFOs connected to
AFI[7..0] and/or BFI[7..0].
CC
to ensure that the write strobe is inactive at power-
Description
2
C port (but the required pull-up re-
CY7C64601/603/613
CC
CC
to ensure that
to ensure that
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