AT43USB380E-AU Atmel, AT43USB380E-AU Datasheet - Page 3

• Manufacturer Part Number: AT43USB380E-AU
• Description: IC USB HOST PROC UPGRD 64LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB380E-AU

• Applications: USB Host/Function Processor
• Controller Series: AT43USB
• Interface: USB
• Number Of I /o: 32
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Core Processor: -
• Program Memory Type: -
• Ram Size: -

3420AS–USB–03/04
Table 1. Pin Description of the AT43USB380 (Continued)
Signal Name
SESS_VLD
SESS_END
SESS_LOW
SESS_HIGH
LOW_CUR
DISCHARGE
Oscillator, Clocks
XTAL1
XTAL2
LFT
CLK_SEL
RESET_N
Jtag Interface
TCK/SI
TDI/SCK
TDO/SO
TMS/CS
TRST_N
Test Pins
TP0
TP1
TP2
TP3
TP4/SCAN_EN
TP_CLK
/D_CLK
TP_RCV_DATA
/RCV_DATA
AT43USB380 Upgrade Map Summary
Dir.
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Polarity
LO
LO
Width
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Description
Charge Pump; Active high when VBUS >
VSESS_VLD otherwise "0"
Charge Pump; Active high when VBUS >
VSESS_END otherwise "0"
Charge Pump; Active high when VBUS >
VSESS_LOW otherwise "0"
Charge Pump; Active high when VBUS >
VSESS_HIGH otherwise "0"
Limits the current output of the Charge
Pump. Used during VBUS pulsing when
configured as B-device
Charge Pump; Connect VBUS to ground
Oscillator input
Oscillator output
PLL loop filter
Clock Source selection between crystal and
external oscillator
RESET for USB Processor
TP3=0: JTAG Clock - from JTAG controller;
TP3=1: SI-EEPROM
TP3=0: JTAG Serial Data IN - from JTAG
controller;
TP3=1: SCK-EEPROM
TP3=0: JTAG Serial Data OUT - from JTAG
controller;
TP3=1: SO-EEPROM
TP3=0: JTAG Mode Select - from JTAG
controller;
TP3=1: CS-EEPROM
JTAG Reset - from JTAG controller
Test pin 0
Test Pin 1
Test pin 2
Test pin 3
Test pin 4/SCAN_EN
Clock test output/SIE DPLL extracted clock
Extracted serial data test output
3