CY7C64013C-SXC Cypress Semiconductor Corp, CY7C64013C-SXC Datasheet - Page 18

• Manufacturer Part Number: CY7C64013C-SXC
• Description: IC MCU 8K FULL SPEED USB 28SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C64013C-SXC

• Applications: USB Microcontroller
• Core Processor: M8C
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C640xx
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 19
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: (8051) USB
• No. Of I/o's: 19
• Ram Memory Size: 256Byte
• Cpu Speed: 48MHz
• Digital Ic Case Style: SOIC
• Supply Voltage Range: 4V To 5.5V
• Core Size: 8 Bit
• Program Memory Size: 8KB
• Embedded Interface Type: HAPI, I2C, USB
• Rohs Compliant: Yes
• Processor Series: CY7C64xx
• Core: M8C
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: HAPI, I2C
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P03
• Minimum Operating Temperature: 0 C
• Package: 28SOIC
• Device Core: M8C
• Family Name: enCoRe II
• Maximum Speed: 12 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Details
• Other names: 428-1847

Table 12. Port 2 Interrupt Enable
Table 13. Port 3 Interrupt Enable
DAC Port
The CY7C64113C features a programmable current sink 4 bit
port which is also known as a DAC port. Each of these port I/O
pins have a programmable current sink. Writing a ‘1’ to a DAC
I/O pin disables the output current sink (Isink DAC) and drives
Document Number: 38-08001 Rev. *D
Port 2 Interrupt
Enable
Bit #
Bit Name
Read/Write
Reset
Port 3 Interrupt
Enable
Bit #
Bit Name
Read/Write
Reset
P2.7 Intr Enable P2.6 Intr Enable P2.5 Intr Enable P2.4 Intr Enable P2.3 Intr Enable P2.2 Intr Enable P2.1 Intr Enable P2.0 Intr Enable
Reserved
(Set to 0)
W
W
7
0
7
0
P3.6 Intr Enable P3.5 Intr Enable P3.4 Intr Enable P3.3 Intr Enable P3.2 Intr Enable P3.1 Intr Enable P3.0 Intr Enable
W
W
6
0
6
0
W
W
5
0
5
0
W
W
4
0
4
0
the I/O pin HIGH through an integrated 14-k resistor. When a
‘0’ is written to a DAC I/O pin, the Isink DAC is enabled and the
pull-up resistor is disabled. This causes the I
current to drive the output LOW.
of the DAC port pin.
W
W
3
0
3
0
W
W
2
0
2
0
Figure 4
W
W
1
0
1
0
shows a block diagram
CY7C64013C
CY7C64113C
ADDRESS 0x06
ADDRESS 0x07
sink
Page 18 of 53
DAC to sink
W
W
0
0
0
0
[+] Feedback