CY7C63723C-SXC Cypress Semiconductor Corp, CY7C63723C-SXC Datasheet - Page 25

• Manufacturer Part Number: CY7C63723C-SXC
• Description: IC MCU 8K LS USB/PS-2 18-SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63723C-SXC

• Package / Case: 18-SOIC (7.5mm Width)
• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C637xx
• Ram Size: 256 x 8
• Interface: PS2, USB
• Number Of I /o: 10
• Voltage - Supply: 3.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Product: USB and PS/2 Controller
• Number Of I/os: 10
• Operating Supply Voltage: 11 V
• Supply Current (max): 20 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 300 mW
• Number Of Timers: 4
• Core Size: 8 Bit
• No. Of I/o's: 10
• Program Memory Size: 8KB
• Ram Memory Size: 256Byte
• Cpu Speed: 12MHz
• No. Of Timers: 1
• Embedded Interface Type: PS/2, USB
• Digital Ic Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1855

12-bit Free-running Timer
The 12-bit timer operates with a 1-μs tick, provides two interrupts
(128-μs and 1.024-ms) and allows the firmware to directly time
events that are up to 4 ms in duration. The lower eight bits of the
timer can be read directly by the firmware. Reading the lower
eight bits latches the upper four bits into a temporary register.
When the firmware reads the upper four bits of the timer, it is
actually reading the count stored in the temporary register. The
effect of this is to ensure a stable 12-bit timer value can be read,
even when the two reads are separated in time.
Figure 24. Timer LSB Register (Address 0x24)
Document #: 38-08022 Rev. *D
Read/Write
Bit Name
Reset
Bit #
R
7
0
11
L3
D3
R
6
0
10
L2
D2
R
5
0
9
L1
D1
Timer [7:0]
R
4
0
8
L0
D0
R
3
0
7
D7
R
2
0
6
Figure 26. Timer Block Diagram
D6
R
1
0
5
D5
R
0
0
4
D4
3
Bit [7:0]: Timer lower eight bits
Figure 25. Timer MSB Register (Address 0x25)
Bit [7:4]: Reserved
Bit [3:0]: Timer upper four bits
Read/Write
D3
Bit Name
Reset
Bit #
2
D2
1
D1
7
0
-
8
0
D0
Reserved
6
0
-
5
0
-
1.024-ms interrupt
128-
1 MHz clock
To Timer Registers
4
0
-
μ
s interrupt
R
3
0
CY7C63722C
CY7C63723C
CY7C63743C
Timer [11:8]
R
2
0
Page 25 of 53
R
1
0
R
0
0
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