CY7C63231A-SXC Cypress Semiconductor Corp, CY7C63231A-SXC Datasheet - Page 25
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CY7C63231A-SXC
Manufacturer Part Number
CY7C63231A-SXC
Description
IC MCU 3K USB LS PERIPH 18-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™r
Specifications of CY7C63231A-SXC
Applications
USB Microcontroller
Core Processor
M8B
Program Memory Type
OTP (3 kB)
Controller Series
CY7C632xx
Ram Size
96 x 8
Interface
USB
Number Of I /o
10
Voltage - Supply
3.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
18-SOIC (7.5mm Width)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
SOIC
Mounting
Surface Mount
Processor Series
CY7C63xx
Core
M8B
Data Bus Width
8 bit
Program Memory Size
3 KB
Data Ram Size
96 B
Interface Type
PS2, USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
10
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
428-1719-5
CY7C63231A-SXC
CY7C63231A-SXC
Available stocks
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Part Number
Manufacturer
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Price
14.0
The supports one USB Device Address with two endpoints: EP0 and EP1.
14.1
The USB Device Address Register contains a 7-bit USB address and one bit to enable USB communication. This register is
cleared during a reset, setting the USB device address to zero and marking this address as disabled. Figure 14-1 shows the
format of the USB Address Register.
In either USB or PS/2 mode, this register is cleared by both hardware resets and the USB bus reset. See Section 19.3 for more
information on the USB Bus Reset - PS/2 interrupt.
Bit 7: Device Address Enable
Bit [6:0]: Device Address Bit[6:0]
14.2
All USB devices are required to have an endpoint number 0 (EP0) that is used to initialize and control the USB device. EP0
provides access to the device configuration information and allows generic USB status and control accesses. EP0 is bidirectional,
as the device can both receive and transmit data. EP0 uses an 8-byte FIFO at SRAM locations 0xF8-0xFF, as shown in
Section 8.2.
The EP0 endpoint mode register uses the format shown in Figure 14-2.
The SIE provides a locking feature to prevent firmware from overwriting bits in the USB Endpoint 0 Mode Register. Writes to the
register have no effect from the point that Bit[6:0] of the register are updated (by the SIE) until the firmware reads this register.
The CPU can unlock this register by reading it.
Because of these hardware-locking features, firmware should perform an read after a write to the USB Endpoint 0 Mode Register
and USB Endpoint 0 Count Register (Figure 14-4) to verify that the contents have changed as desired, and that the SIE has not
updated these values.
Bit [7:4] of this register are cleared by any non-locked write to this register, regardless of the value written.
Bit 7: SETUP Received
Document #: 38-08028 Rev. *B
Read/Write
Read/Write
Bit Name
Bit Name
This bit must be enabled by firmware before the serial interface engine (SIE) will respond to USB traffic at the address specified
in Bit [6:0].
1 = Enable USB device address.
0 = Disable USB device address.
These bits must be set by firmware during the USB enumeration process (i.e., SetAddress) to the non-zero address assigned
by the USB host.
1 = A valid SETUP packet has been received. This bit is forced HIGH from the start of the data packet phase of the SETUP
transaction until the start of the ACK packet returned by the SIE. The CPU is prevented from clearing this bit during this interval.
Reset
Reset
Bit #
Bit #
USB Address Register
USB Control Endpoint
USB Device
Received
Address
SETUP
Enable
Device
R/W
R/W
7
0
7
0
Received
Figure 14-1. USB Device Address Register (Address 0x10)
R/W
R/W
IN
Figure 14-2. Endpoint 0 Mode Register (Address 0x12)
6
0
6
0
FOR
FOR
Received
OUT
R/W
R/W
5
0
5
0
Transaction
ACKed
R/W
R/W
4
0
4
0
Device Address Bit
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
CY7C63221/31A
Mode Bit
enCoRe™ USB
R/W
R/W
1
0
1
0
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R/W
R/W
0
0
0
0
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