XC3064-70PQ160C Xilinx Inc, XC3064-70PQ160C Datasheet - Page 2

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XC3064-70PQ160C

Manufacturer Part Number
XC3064-70PQ160C
Description
IC LOGIC CL ARRAY 6400GAT 160PQF
Manufacturer
Xilinx Inc
Series
XC3000r
Datasheet

Specifications of XC3064-70PQ160C

Number Of Labs/clbs
224
Total Ram Bits
46064
Number Of I /o
120
Number Of Gates
4500
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
160-BQFP
Case
QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-
Other names
122-1028
XC3064-70PQ160C-0300
XC3064-70PQ160C03
XC3064-70PQ160C03

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Quantity
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Part Number:
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0
XC3000 Logic Cell Array Family
Absolute Maximum Ratings
Xilinx maintains test specifications for each product as controlled documents. To insure the use of the most recently
released device performance parameters, please request a copy of the current test-specification revision.
Operating Conditions
At junction temperatures above those listed as Operating Conditions, all delay parameters increase by 0.3% per C.
Note: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
Symbol Description
Symbol
V
V
V
T
T
T
V
V
V
V
V
T
STG
SOL
J
CC
IN
TS
IN
CC
IHT
ILT
IHC
ILC
These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those listed under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum
Ratings conditions for extended periods of time may affect device reliability.
Supply voltage relative to GND
Input voltage with respect to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Maximum soldering temperature (10 s @ 1/16 in.)
Junction temperature plastic
Junction temperature ceramic
Description
Supply voltage relative to GND Commercial 0 C to +85 C junction
Supply voltage relative to GND Industrial -40 C to +100 C junction
High-level input voltage — TTL configuration
Low-level input voltage — TTL configuration
High-level input voltage — CMOS configuration
Low-level input voltage — CMOS configuration
Input signal transition time
2-154
–0.5 to +7.0
–0.5 to V
–0.5 to V
–65 to +150
+260
+125
+150
Min
4.75
2.0
0
70%
0
4.5
CC
CC
+0.5
+0.5
Max
5.25
5.5
V
0.8
100% V
20%
250
CC
Units
Units
V
V
V
V
V
ns
CC
CC
V
V
V
C
C
C
C

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