EP2S130F1508I5 Altera, EP2S130F1508I5 Datasheet - Page 41
EP2S130F1508I5
Manufacturer Part Number
EP2S130F1508I5
Description
IC STRATIX II FPGA 130K 1508FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S130F1508I5
Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
1126
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S130F1508I5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2S130F1508I5N
Manufacturer:
ALTERA
Quantity:
329
- Current page: 41 of 238
- Download datasheet (3Mb)
Figure 2–21. M4K RAM Block Control Signals
Altera Corporation
May 2007
Dedicated
Row LAB
Clocks
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
The M4K RAM blocks allow for different clocks on their inputs and
outputs. Either of the two clocks feeding the block can clock M4K RAM
block registers (renwe, address, byte enable, datain, and output registers).
Only the output register can be bypassed. The six labclk signals or local
interconnects can drive the control signals for the A and B ports of the
M4K RAM block. ALMs can also control the clock_a, clock_b,
renwe_a, renwe_b, clr_a, clr_b, clocken_a, and clocken_b
signals, as shown in
The R4, C4, and direct link interconnects from adjacent LABs drive the
M4K RAM block local interconnect. The M4K RAM blocks can
communicate with LABs on either the left or right side through these row
resources or with LAB columns on either the right or left with the column
resources. Up to 16 direct link input connections to the M4K RAM Block
are possible from the left adjacent LABs and another 16 possible from the
right adjacent LAB. M4K RAM block outputs can also connect to left and
right LABs through direct link interconnect.
RAM block to logic array interface.
6
clock_a
clock_b
Figure
clocken_a
2–21.
clocken_b
Stratix II Device Handbook, Volume 1
renwe_a
Figure 2–22
renwe_b
Stratix II Architecture
aclr_a
shows the M4K
aclr_b
2–33
Related parts for EP2S130F1508I5
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: