XC2VP100-6FFG1696C Xilinx Inc, XC2VP100-6FFG1696C Datasheet - Page 430
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XC2VP100-6FFG1696C
Manufacturer Part Number
XC2VP100-6FFG1696C
Description
IC FPGA VIRTEX-II PRO 1696-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet
1.XC2VP20-5FGG676C.pdf
(430 pages)
Specifications of XC2VP100-6FFG1696C
Number Of Logic Elements/cells
99216
Number Of Labs/clbs
11024
Total Ram Bits
8183808
Number Of I /o
1164
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1696-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Virtex-II Pro Data Sheet
The Virtex-II Pro Data Sheet contains the following modules:
•
•
DS083 (v4.7) November 5, 2007
Product Specification
11/17/04
03/01/05
06/20/05
09/15/05
10/10/05
03/05/07
11/05/07
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
Introduction and Overview (Module 1)
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
Functional Description (Module 2)
Date
R
Version
4.1
4.2
4.3
4.4
4.5
4.6
4.7
•
•
•
No changes in Module 4 for this revision.
No changes in Module 4 for this revision.
No changes in Module 4 for this revision.
•
•
Updated copyright notice and legal disclaimer.
Table
Figure 7, page
used.
Table
316.
Table
“Input/Output/Bidirectional”.
Figure 2, page
4: Added requirement to V
3: Corrected number of Differential I/O Pairs for XC2VP30-FF1152 from 340 to
4: Changed Direction for User I/O pins (IO_LXXY_#) from “Input/Output” to
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
29: Corrected NOTE 3.
161: Updated with drawing showing correct heat sink profile and detail.
www.xilinx.com
•
•
BATT
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC
and Switching Characteristics (Module 3)
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
Pinout Information (Module 4)
Revision
to connect pin to V
CCAUX
or GND if battery is not
Module 4 of 4
(“CRITICAL
302
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